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Mon, 03 Aug 2026 03:58:40 -0700 (PDT) X-Received: by 2002:a05:6a21:3417:b0:3c3:990b:2292 with SMTP id adf61e73a8af0-3c92a8f3f4fmr9269540637.57.1785754719981; Mon, 03 Aug 2026 03:58:39 -0700 (PDT) Received: from [10.218.15.172] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13fab4cb51asm47453727c88.9.2026.08.03.03.58.34 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 03 Aug 2026 03:58:39 -0700 (PDT) Message-ID: Date: Mon, 3 Aug 2026 16:28:32 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/7] irqchip/irq-qcom-mpm: Register MPM under CPU cluster power domain To: Stephan Gerhold , Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Shawn Guo , Marc Zyngier , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260713-b4-shikra_lpm_addition-v1-0-3d858df2cbbf@oss.qualcomm.com> <20260713-b4-shikra_lpm_addition-v1-2-3d858df2cbbf@oss.qualcomm.com> <7c8178ec-8bab-4427-8faa-5b28cb76a5ad@oss.qualcomm.com> Content-Language: en-US From: Sneh Mankad In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: dTIqNeC00cMv5_xTencRlX_x-gNLfIlP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODAzMDA5OCBTYWx0ZWRfX7Z2FHiPAAunZ 2e4rrRALPYN+LIY6boD4EoAG3pv4mfhjIBS58foJf5khod16MH9LXzgQz1gQzxse8ZOPRw5DxdZ fVd1YekBWz/U4CXB1IcKLbSbarEoZRGbYT5+NrMuHfGuGjwFeD2GkarY4MftXM38XBjV0jyu1yV qGIHRYxXOTbICMB5kX4q0yCIsCOLljbHeHlnnqyW0SehRjalN+4SvHPf2/BMfy7LidCv6rWeu4O wJN+Jjnu9fSdNqkQOb0O3iHNxvZhqob+exFO811g5Ux9ZrtYh4yiemzSHGxSL68KIp8RVdPHhs5 WENbmKRSKmZT6JcKgD/FoGZnDz9lKdl36rTR1SD0DIhUqIIAFbIU1vfPwHqqTJWrOQkG8sRMo7Y yE7EujVjqdTXynKmPjHv8xiwNqvtcjhdR/U2RP5iQ4Uyfu8D3qoyXFnnRZGBEXw5WOdXW3JFELE 9v2XAw46ZB9iGkxtVSg== X-Proofpoint-GUID: dTIqNeC00cMv5_xTencRlX_x-gNLfIlP X-Authority-Analysis: v=2.4 cv=PqSjqQM3 c=1 sm=1 tr=0 ts=6a707461 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=ERnfXskPEjP3n-q0xIsA:9 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODAzMDA5OCBTYWx0ZWRfX1RpM8iqZWDSr DARsPLPxOt6yH3aYl7iBBdL9qsDYhWLWdl7H1+1VvzgHz+P64b5/TGw2c3ftevz8WptIe1ZfSmL jNoEnoSdSzrLDpiFW0d8GaXxLoGCYso= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-02_06,2026-07-30_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 spamscore=0 priorityscore=1501 adultscore=0 clxscore=1015 impostorscore=0 suspectscore=0 bulkscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608030098 On 15-Jul-26 4:04 PM, Stephan Gerhold wrote: > On Wed, Jul 15, 2026 at 11:46:58AM +0200, Konrad Dybcio wrote: >> On 7/13/26 12:25 PM, Sneh Mankad wrote: >>> MPM irqchip needs to notify RPM (Resource Power Manager) processor to read >>> the latest wake up capable interrupts when the CPU cluster is entering the >>> deepest idle state. This is done by sending IPC interrupt to RPM and is >>> implemented as .power_off() callback by registering MPM as parent power >>> domain to CPU cluster. >> >> [...] >> >>> If MPM has not registered with CPU cluster power domain, utilize the CPU PM >>> notifications to manage RPM communication when the last CPU goes to power >>> collapse. >> >> I have mixed feelings about this case. The RPMH RSC driver keeps that as a >> fallback for platforms which don't have PSCI OSI mode specifically. >> >> On the other hand, there are platforms (early arm64 - pre-msm8996 and almost >> all of the arm32 platforms) that don't define any CPU power domains, so >> perhaps it's necessary after all.. >> > > I don't think this fallback is relevant for the non-PSCI QC platforms, > for the following reasons: > > - They don't define the MPM. > - They don't support cluster idle upstream, so they don't need to > define the MPM. They can't reach the idle state where it would become > relevant. > - The setup for cluster idle without PSCI is essentially equivalent to > OSI, except that the SPM/SAW driver needs to program the idle state > to enter. There is one SPM/SAW for every idle domain (e.g. on > MSM8939: 2x4 CPU, 2x Cluster, 1x System). You can just model the > SPM/SAW instances as power domains to get the same setup as PSCI OSI > (I had a draft for this at some point). So if someone ever implements > this, we should be able to use the same approach as for PSCI OSI. > > I'm not aware of non-OSI PSCI platforms with MPM either, so I'm not sure > when this fallback would be used. > > We probably do need some fallback for the old sm6375/agatii DTBs though. Yes Stephan, this fallback will be required for RPM targets that do not have power-domains property mentioned to facilitate the RPM notification in cluster idle states, including agatti and sm6375. Thanks, Sneh