From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47F47EB64DA for ; Thu, 20 Jul 2023 13:18:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231805AbjGTNSe (ORCPT ); Thu, 20 Jul 2023 09:18:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41638 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231635AbjGTNSc (ORCPT ); Thu, 20 Jul 2023 09:18:32 -0400 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71CA410FC for ; Thu, 20 Jul 2023 06:18:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1689859111; x=1721395111; h=message-id:date:mime-version:cc:subject:to:references: from:in-reply-to:content-transfer-encoding; bh=StnBaGaOlRqqTLgANOZt5SAXy2wagVOHiKTaAVKHt2Y=; b=NESimaLjYzpdcbjHU3VdRjEJS5kh0K5WoiaiWm9yqxP48ui06Ej0rGOn D6VAguqUew3vkoeT6D9z9/Rg2dypjx/tQDblLMYYNq792C5eOkABOBvDq f0sbfwbFFa/m8Ju2MvsZjjVYj4fICK3QyZGW38IKkUN+XZefeUCowM1lG qYytyDzJgKF3/uRaAQMR4BucZtZGMTIgjnkX9S2cAbtkAqticGK3ZHQhF T4X17xX0vesZXA1evnfvgDbKrb2IqibmNd2S0xpXnlhQCE8lO2B6W/dlh bWKRPNWdGZZZNjbRqN7Hm/nNLjXIOHxJQ2fEqB/+p8EQrXQbfkW4dUkq7 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10777"; a="370297816" X-IronPort-AV: E=Sophos;i="6.01,218,1684825200"; d="scan'208";a="370297816" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2023 06:08:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10777"; a="727684950" X-IronPort-AV: E=Sophos;i="6.01,218,1684825200"; d="scan'208";a="727684950" Received: from blu2-mobl.ccr.corp.intel.com (HELO [10.252.191.109]) ([10.252.191.109]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 20 Jul 2023 06:08:28 -0700 Message-ID: Date: Thu, 20 Jul 2023 21:08:22 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.13.0 Cc: baolu.lu@linux.intel.com, Palmer Dabbelt , Albert Ou , Anup Patel , Sunil V L , Nick Kossifidis , Sebastien Boeuf , iommu@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux@rivosinc.com Subject: Re: [PATCH 06/11] RISC-V: drivers/iommu/riscv: Add command, fault, page-req queues Content-Language: en-US To: Tomasz Jeznach , Joerg Roedel , Will Deacon , Robin Murphy , Paul Walmsley References: <1fd79e5c53d9d6ed2264f60dd4261f293cc00472.1689792825.git.tjeznach@rivosinc.com> From: Baolu Lu In-Reply-To: <1fd79e5c53d9d6ed2264f60dd4261f293cc00472.1689792825.git.tjeznach@rivosinc.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2023/7/20 3:33, Tomasz Jeznach wrote: > Enables message or wire signal interrupts for PCIe and platforms devices. If this patch could be divided into multiple small patches, each logically doing one specific thing, it will help people better review the code. Best regards, baolu