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[130.180.211.218]) by smtp.googlemail.com with ESMTPSA id ffacd0b85a97d-37189896c50sm10828491f8f.85.2024.08.19.08.42.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Aug 2024 08:42:56 -0700 (PDT) Message-ID: Date: Mon, 19 Aug 2024 17:42:55 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] arm64: dts: allwinner: Add GPU thermal trips to the SoC dtsi for A64 To: Dragan Simic , Icenowy Zheng Cc: linux-sunxi@lists.linux.dev, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-kernel@vger.kernel.org, wenst@chromium.org, broonie@kernel.org References: <24406e36f6facd93e798113303e22925b0a2dcc1.camel@icenowy.me> <25b65e9ef1cae59a8366532cc8db576b@manjaro.org> Content-Language: en-US From: Daniel Lezcano In-Reply-To: <25b65e9ef1cae59a8366532cc8db576b@manjaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 12/08/2024 04:46, Dragan Simic wrote: > Hello Icenowy, > > On 2024-08-12 04:40, Icenowy Zheng wrote: >> 在 2024-08-12星期一的 04:00 +0200，Dragan Simic写道： >>> Add thermal trips for the two GPU thermal sensors found in the >>> Allwinner A64. >>> There's only one GPU OPP defined since the commit 1428f0c19f9c >>> ("arm64: dts: >>> allwinner: a64: Run GPU at 432 MHz"), so defining only the critical >>> thermal >>> trips makes sense for the A64's two GPU thermal zones. >>> >>> Having these critical thermal trips defined ensures that no hot spots >>> develop >>> inside the SoC die that exceed the maximum junction temperature. >>> That might >>> have been possible before, although quite unlikely, because the CPU >>> and GPU >>> portions of the SoC are packed closely inside the SoC, so the >>> overheating GPU >>> would inevitably result in the heat soaking into the CPU portion of >>> the SoC, >>> causing the CPU thermal sensor to return high readings and trigger >>> the CPU >>> critical thermal trips.  However, it's better not to rely on the heat >>> soak >>> and have the critical GPU thermal trips properly defined instead. >>> >>> While there, remove a few spotted comments that are rather redundant, >>> because >>> it's pretty much obvious what units are used in those places. >> >> This should be another individual patch, I think. > > Perhaps, which I already thought about, but it might also be best > to simply drop the removal of those redundant comments entirely. > Let's also see what will other people say. > >>> Signed-off-by: Dragan Simic >>> --- >>>  arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 22 ++++++++++++++--- >>> -- >>>  1 file changed, 16 insertions(+), 6 deletions(-) >>> >>> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >>> b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >>> index e868ca5ae753..bc5d3a2e6c98 100644 >>> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >>> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >>> @@ -212,7 +212,6 @@ timer { >>> >>>         thermal-zones { >>>                 cpu_thermal: cpu0-thermal { >>> -                       /* milliseconds */ >> >> The unit of a 0 isn't not so obvious I think, so I suggest to keep >> this. > > Quite frankly, I think it should be obvious to anyone tackling > the thermal zones and trips. You can remove also polling-delay-passive and polling-passive when they are equal to zero. If they are absent they will be set to zero by default. That said, I take the opportunity to spot some inconsistency in this DT not related to this change. 1. There is a passive trip point and one cooling device mapped to it. With a polling-delay-passive=0, the mitigation will fail 2. There is a second mapping for the hot trip point. That does not make sense, it is not possible because there is no mitigation for 'hot' and 'critical' trip points. -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog