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Wed, 23 Oct 2024 19:27:09 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 49NJR7iA027983 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 23 Oct 2024 19:27:07 GMT Received: from [10.216.22.63] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 23 Oct 2024 12:27:01 -0700 Message-ID: Date: Thu, 24 Oct 2024 00:56:58 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/3] dt-bindings: opp: Add v2-qcom-adreno vendor bindings To: Krzysztof Kozlowski CC: Rob Clark , Sean Paul , "Konrad Dybcio" , Abhinav Kumar , Dmitry Baryshkov , Marijn Suijten , David Airlie , "Simona Vetter" , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , , , , , , References: <20241021-gpu-acd-v2-0-9c25a62803bc@quicinc.com> <20241021-gpu-acd-v2-2-9c25a62803bc@quicinc.com> Content-Language: en-US From: Akhil P Oommen In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: sygsDimvIhAM-eyZUnFnjmWrKR5d0XeP X-Proofpoint-ORIG-GUID: sygsDimvIhAM-eyZUnFnjmWrKR5d0XeP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 mlxscore=0 lowpriorityscore=0 phishscore=0 impostorscore=0 clxscore=1015 priorityscore=1501 mlxlogscore=999 suspectscore=0 bulkscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2410230125 On 10/22/2024 11:19 AM, Krzysztof Kozlowski wrote: > On Mon, Oct 21, 2024 at 05:23:43PM +0530, Akhil P Oommen wrote: >> Add a new schema which extends opp-v2 to support a new vendor specific >> property required for Adreno GPUs found in Qualcomm's SoCs. The new >> property called "qcom,opp-acd-level" carries a u32 value recommended >> for each opp needs to be shared to GMU during runtime. >> >> Cc: Rob Clark >> Signed-off-by: Akhil P Oommen >> --- >> .../bindings/opp/opp-v2-qcom-adreno.yaml | 96 ++++++++++++++++++++++ >> 1 file changed, 96 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml >> new file mode 100644 >> index 000000000000..6d50c0405ef8 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/opp/opp-v2-qcom-adreno.yaml >> @@ -0,0 +1,96 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/opp/opp-v2-qcom-adreno.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Qualcomm Adreno compatible OPP supply >> + >> +description: >> + Adreno GPUs present in Qualcomm's Snapdragon chipsets uses an OPP specific >> + ACD related information tailored for the specific chipset. This binding >> + provides the information needed to describe such a hardware value. >> + >> +maintainers: >> + - Rob Clark >> + >> +allOf: >> + - $ref: opp-v2-base.yaml# >> + >> +properties: >> + compatible: >> + items: >> + - const: operating-points-v2-adreno >> + - const: operating-points-v2 >> + >> +patternProperties: >> + '^opp-?[0-9]+$': > > '-' should not be optional. opp1 is not expected name. Agree. Will change this to '^opp-[0-9]+$' > >> + type: object >> + additionalProperties: false >> + >> + properties: >> + opp-hz: true >> + >> + opp-level: true >> + >> + opp-peak-kBps: true >> + >> + opp-supported-hw: true >> + >> + qcom,opp-acd-level: >> + description: | >> + A positive value representing the ACD (Adaptive Clock Distribution, >> + a fancy name for clk throttling during voltage droop) level associated >> + with this OPP node. This value is shared to a co-processor inside GPU >> + (called Graphics Management Unit a.k.a GMU) during wake up. It may not >> + be present for some OPPs and GMU will disable ACD while transitioning >> + to that OPP. This value encodes a voltage threshold and few other knobs >> + which are identified by characterization of the SoC. So, it doesn't have >> + any unit. > > Thanks for explanation and other updates. I am still not happy with this > property. I do not see reason why DT should encode magic values in a > quite generic piece of code. This creates poor ABI, difficult to > maintain or understand. > Configuring GPU ACD block with its respective value is a requirement for each OPP. So OPP node seems like the natural place for this data. If it helps to resolve your concerns, I can elaborate the documentation with details on the GMU HFI interface where this value should be passed on to the hardware. Also replace "few other knobs" with "Delay cycles & Calibration margin" in the above doc. > >> + $ref: /schemas/types.yaml#/definitions/uint32 >> + >> + required: >> + - opp-hz >> + - opp-level >> + >> +required: >> + - compatible >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include >> + >> + gpu_opp_table: opp-table { >> + compatible = "operating-points-v2-adreno", "operating-points-v2"; >> + >> + opp-687000000 { >> + opp-hz = /bits/ 64 <687000000>; > > Messed indentation. It seems my text editor got confused here. Will fix. Thanks, -Akhil > > Best regards, > Krzysztof > >