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Thu, 18 Jun 2026 06:05:03 -0700 (PDT) X-Received: by 2002:a05:620a:d95:b0:915:769d:56e with SMTP id af79cd13be357-91f27bdf21amr330324285a.1.1781787902760; Thu, 18 Jun 2026 06:05:02 -0700 (PDT) Received: from [192.168.120.170] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6954c2a4450sm2231829a12.16.2026.06.18.06.04.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 18 Jun 2026 06:05:01 -0700 (PDT) Message-ID: Date: Thu, 18 Jun 2026 15:04:57 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 5/6] arm64: dts: qcom: monaco: Add OPP-table for ICE UFS and ICE eMMC nodes To: Abhinaba Rakshit , Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Adrian Hunter , Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neeraj Soni , Harshal Dev , Kuldeep Singh Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org References: <20260609-enable-ice-clock-scaling-v11-0-1cebc8b3275b@oss.qualcomm.com> <20260609-enable-ice-clock-scaling-v11-5-1cebc8b3275b@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260609-enable-ice-clock-scaling-v11-5-1cebc8b3275b@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE4MDEyMSBTYWx0ZWRfX6RYh8oYIFvcs q0XVOvHGaPVwg0fHzmUxbtvug7oj5ZMS037EhwVMMOFfjnpw/IYsrvHg0+sCcuySxQYhGVMkIqe qT5jN3BzdopFDYnrgcO+PL6K/nZKzuOEqr1OXK0Hr8aUc4U7mu/CNYNFAUJmLPGdqdhuLGIps2W XkfKdjB+559AA7o68rJBtLYPsy90APGUX/bnScqn6W9iM1AMpPfFMwY2w5VpFnnH9+PpC2T3zjH jZ3DDXHl4Omjr0xgGYukCp8OipSNjOBLUDrVSjChxK9txbN74+tYHvWX/GlsonyYM+AoNkmhzmP 0YwgsTzhWQnc+mNwSeRMMmODnUbAppgyNRgGwv1ooZQ+zCLVgpbq9Ckm6nJIcFOc+wclBF4iXY5 914TvRHVkQWYCBKtRnmMCUojicmzXqPi2Dkgv3nlZdPpGoe8IKMWG6yx8GMwYnMiurSI6WmtDVe +qAsth0ocfIHVJKcWYw== X-Proofpoint-ORIG-GUID: K5wUTqv8YBjZ9Vp5yW7tJVFFtZViK2U0 X-Authority-Analysis: v=2.4 cv=UrRT8ewB c=1 sm=1 tr=0 ts=6a33ed01 cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=QRdWpJMrku1fmPn5X40A:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-GUID: K5wUTqv8YBjZ9Vp5yW7tJVFFtZViK2U0 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE4MDEyMSBTYWx0ZWRfX8Ky/+9x7er2r 4pDdAI7keWuqqthQ4eo9mhEZbQslo0AyXmoV5M1ZgUuOoQ5B9y5PlqLVfRv/kc7qIOOzZc2m5rO ZvKro0RZdcaGRH28d0cvnqa9TFF3oik= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-18_01,2026-06-18_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 bulkscore=0 spamscore=0 suspectscore=0 adultscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606180121 On 6/8/26 11:47 PM, Abhinaba Rakshit wrote: > Qualcomm Inline Crypto Engine (ICE) platform driver now, supports > an optional OPP-table. > > Add OPP-table for ICE UFS and ICE eMMC device nodes for Monaco > platform. > > Signed-off-by: Abhinaba Rakshit > --- > arch/arm64/boot/dts/qcom/monaco.dtsi | 37 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi > index a1b6e6211b84d0d5008231c55613a0ccd61b9450..d9298d8b7874b8669b2cded2a28a99dce6eadbda 100644 > --- a/arch/arm64/boot/dts/qcom/monaco.dtsi > +++ b/arch/arm64/boot/dts/qcom/monaco.dtsi > @@ -2742,6 +2742,27 @@ ice: crypto@1d88000 { > clock-names = "core", > "iface"; > power-domains = <&gcc GCC_UFS_PHY_GDSC>; > + > + operating-points-v2 = <&ice_opp_table>; > + > + ice_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-75000000 { > + opp-hz = /bits/ 64 <75000000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; > + > + opp-201600000 { > + opp-hz = /bits/ 64 <201600000>; > + required-opps = <&rpmhpd_opp_svs_l1>; > + }; Since 75 MHz and 201.6 Mhz require the same power level, is the former OPP any useful? Konrad