mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: "CK Hu (胡俊光)" <ck.hu@mediatek.com>
To: "Shawn Sung (宋孝謙)" <Shawn.Sung@mediatek.com>,
	"matthias.bgg@gmail.com" <matthias.bgg@gmail.com>,
	"angelogioacchino.delregno@collabora.com"
	<angelogioacchino.delregno@collabora.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"krzysztof.kozlowski+dt@linaro.org"
	<krzysztof.kozlowski+dt@linaro.org>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-mediatek@lists.infradead.org"
	<linux-mediatek@lists.infradead.org>,
	"Singo Chang (張興國)" <Singo.Chang@mediatek.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"Jason-JH Lin (林睿祥)" <Jason-JH.Lin@mediatek.com>,
	"Nancy Lin (林欣螢)" <Nancy.Lin@mediatek.com>,
	"daniel@ffwll.ch" <daniel@ffwll.ch>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>,
	"conor+dt@kernel.org" <conor+dt@kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@mediatek.com>,
	"airlied@gmail.com" <airlied@gmail.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"nfraprado@collabora.com" <nfraprado@collabora.com>
Subject: Re: [RESEND PATCH v6 15/20] drm/mediatek: Manage component's clock with function pointers
Date: Thu, 28 Sep 2023 01:26:35 +0000	[thread overview]
Message-ID: <d913ce854c9951c3393dda13b91e210a994893ad.camel@mediatek.com> (raw)
In-Reply-To: <20230911074233.31556-16-shawn.sung@mediatek.com>

Hi, Hsiao-chien:

On Mon, 2023-09-11 at 15:42 +0800, Hsiao Chien Sung wrote:
> By registering component related functions to the pointers,
> we can easily manage them within a for-loop and simplify the
> logic of clock control significantly.

Reviewed-by: CK Hu <ck.hu@mediatek.com>

> 
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
>  .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c   | 111 +++++++---------
> --
>  1 file changed, 44 insertions(+), 67 deletions(-)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> index 8a52d1301e04..84133303a6ec 100644
> --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c
> @@ -54,6 +54,7 @@ struct ovl_adaptor_comp_match {
>  	enum mtk_ovl_adaptor_comp_type type;
>  	enum mtk_ddp_comp_id comp_id;
>  	int alias_id;
> +	const struct mtk_ddp_comp_funcs *funcs;
>  };
> 
>  struct mtk_disp_ovl_adaptor {
> @@ -68,20 +69,35 @@ static const char * const
> private_comp_stem[OVL_ADAPTOR_TYPE_NUM] = {
>  	[OVL_ADAPTOR_TYPE_MERGE]	= "merge",
>  };
> 
> +static const struct mtk_ddp_comp_funcs _ethdr = {
> +	.clk_enable = mtk_ethdr_clk_enable,
> +	.clk_disable = mtk_ethdr_clk_disable,
> +};
> +
> +static const struct mtk_ddp_comp_funcs _merge = {
> +	.clk_enable = mtk_merge_clk_enable,
> +	.clk_disable = mtk_merge_clk_disable,
> +};
> +
> +static const struct mtk_ddp_comp_funcs _rdma = {
> +	.clk_enable = mtk_mdp_rdma_clk_enable,
> +	.clk_disable = mtk_mdp_rdma_clk_disable,
> +};
> +
>  static const struct ovl_adaptor_comp_match
> comp_matches[OVL_ADAPTOR_ID_MAX] = {
> -	[OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR,
> DDP_COMPONENT_ETHDR_MIXER, 0 },
> -	[OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA0, 0 },
> -	[OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA1, 1 },
> -	[OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA2, 2 },
> -	[OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA3, 3 },
> -	[OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA4, 4 },
> -	[OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA5, 5 },
> -	[OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA6, 6 },
> -	[OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA7, 7 },
> -	[OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE1, 1 },
> -	[OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE2, 2 },
> -	[OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE3, 3 },
> -	[OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE4, 4 },
> +	[OVL_ADAPTOR_ETHDR0] = { OVL_ADAPTOR_TYPE_ETHDR,
> DDP_COMPONENT_ETHDR_MIXER, 0, &_ethdr },
> +	[OVL_ADAPTOR_MDP_RDMA0] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA0, 0, &_rdma },
> +	[OVL_ADAPTOR_MDP_RDMA1] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA1, 1, &_rdma },
> +	[OVL_ADAPTOR_MDP_RDMA2] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA2, 2, &_rdma },
> +	[OVL_ADAPTOR_MDP_RDMA3] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA3, 3, &_rdma },
> +	[OVL_ADAPTOR_MDP_RDMA4] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA4, 4, &_rdma },
> +	[OVL_ADAPTOR_MDP_RDMA5] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA5, 5, &_rdma },
> +	[OVL_ADAPTOR_MDP_RDMA6] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA6, 6, &_rdma },
> +	[OVL_ADAPTOR_MDP_RDMA7] = { OVL_ADAPTOR_TYPE_MDP_RDMA,
> DDP_COMPONENT_MDP_RDMA7, 7, &_rdma },
> +	[OVL_ADAPTOR_MERGE0] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE1, 1, &_merge },
> +	[OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE2, 2, &_merge },
> +	[OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE3, 3, &_merge },
> +	[OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE,
> DDP_COMPONENT_MERGE4, 4, &_merge },
>  };
> 
>  void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int
> idx,
> @@ -187,73 +203,34 @@ void mtk_ovl_adaptor_stop(struct device *dev)
> 
>  int mtk_ovl_adaptor_clk_enable(struct device *dev)
>  {
> -	struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
> -	struct device *comp;
> -	int ret;
>  	int i;
> -
> -	for (i = 0; i < OVL_ADAPTOR_MERGE0; i++) {
> -		comp = ovl_adaptor->ovl_adaptor_comp[i];
> -		ret = pm_runtime_get_sync(comp);
> -		if (ret < 0) {
> -			dev_err(dev, "Failed to enable power domain %d,
> err %d\n", i, ret);
> -			goto pwr_err;
> -		}
> -	}
> +	int ret;
> +	struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
> 
>  	for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
> -		comp = ovl_adaptor->ovl_adaptor_comp[i];
> -
> -		if (i < OVL_ADAPTOR_MERGE0)
> -			ret = mtk_mdp_rdma_clk_enable(comp);
> -		else if (i < OVL_ADAPTOR_ETHDR0)
> -			ret = mtk_merge_clk_enable(comp);
> -		else
> -			ret = mtk_ethdr_clk_enable(comp);
> +		dev = ovl_adaptor->ovl_adaptor_comp[i];
> +		if (!dev)
> +			continue;
> +		ret = comp_matches[i].funcs->clk_enable(dev);
>  		if (ret) {
> -			dev_err(dev, "Failed to enable clock %d, err
> %d\n", i, ret);
> -			goto clk_err;
> +			while (--i >= 0)
> +				comp_matches[i].funcs-
> >clk_disable(dev);
> +			return ret;
>  		}
>  	}
> -
> -	return ret;
> -
> -clk_err:
> -	while (--i >= 0) {
> -		comp = ovl_adaptor->ovl_adaptor_comp[i];
> -		if (i < OVL_ADAPTOR_MERGE0)
> -			mtk_mdp_rdma_clk_disable(comp);
> -		else if (i < OVL_ADAPTOR_ETHDR0)
> -			mtk_merge_clk_disable(comp);
> -		else
> -			mtk_ethdr_clk_disable(comp);
> -	}
> -	i = OVL_ADAPTOR_MERGE0;
> -
> -pwr_err:
> -	while (--i >= 0)
> -		pm_runtime_put(ovl_adaptor->ovl_adaptor_comp[i]);
> -
> -	return ret;
> +	return 0;
>  }
> 
>  void mtk_ovl_adaptor_clk_disable(struct device *dev)
>  {
> -	struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
> -	struct device *comp;
>  	int i;
> +	struct mtk_disp_ovl_adaptor *ovl_adaptor =
> dev_get_drvdata(dev);
> 
>  	for (i = 0; i < OVL_ADAPTOR_ID_MAX; i++) {
> -		comp = ovl_adaptor->ovl_adaptor_comp[i];
> -
> -		if (i < OVL_ADAPTOR_MERGE0) {
> -			mtk_mdp_rdma_clk_disable(comp);
> -			pm_runtime_put(comp);
> -		} else if (i < OVL_ADAPTOR_ETHDR0) {
> -			mtk_merge_clk_disable(comp);
> -		} else {
> -			mtk_ethdr_clk_disable(comp);
> -		}
> +		dev = ovl_adaptor->ovl_adaptor_comp[i];
> +		if (!dev)
> +			continue;
> +		comp_matches[i].funcs->clk_disable(dev);
>  	}
>  }
> 
> --
> 2.18.0
> 

  reply	other threads:[~2023-09-28  1:26 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-11  7:42 [RESEND PATCH v6 00/20] Add display driver for MT8188 VDOSYS1 Hsiao Chien Sung
2023-09-11  7:42 ` [RESEND PATCH v6 01/20] dt-bindings: display: mediatek: ethdr: Add compatible for MT8188 Hsiao Chien Sung
2023-09-20  6:00   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 02/20] dt-bindings: display: mediatek: mdp-rdma: " Hsiao Chien Sung
2023-09-20  6:05   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 03/20] dt-bindings: display: mediatek: merge: " Hsiao Chien Sung
2023-09-20  6:10   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 04/20] dt-bindings: display: mediatek: padding: Add MT8188 Hsiao Chien Sung
2023-09-20  6:16   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 05/20] dt-bindings: arm: mediatek: Add compatible for MT8188 Hsiao Chien Sung
2023-09-11  7:42 ` [RESEND PATCH v6 06/20] dt-bindings: reset: mt8188: Add VDOSYS reset control bits Hsiao Chien Sung
2023-09-11  7:42 ` [RESEND PATCH v6 07/20] soc: mediatek: Support MT8188 VDOSYS1 in mtk-mmsys Hsiao Chien Sung
2023-09-11  7:42 ` [RESEND PATCH v6 08/20] soc: mediatek: Support MT8188 VDOSYS1 Padding " Hsiao Chien Sung
2023-09-11  7:42 ` [RESEND PATCH v6 09/20] soc: mediatek: Support reset bit mapping in mmsys driver Hsiao Chien Sung
2023-09-11  7:42 ` [RESEND PATCH v6 10/20] soc: mediatek: Add MT8188 VDOSYS reset bit map Hsiao Chien Sung
2023-09-11  7:42 ` [RESEND PATCH v6 11/20] drm/mediatek: Rename OVL_ADAPTOR_TYPE_RDMA Hsiao Chien Sung
2023-09-27 10:20   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 12/20] drm/mediatek: Refine device table of OVL adaptor Hsiao Chien Sung
2023-09-20  6:48   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 13/20] drm/mediatek: Sort OVL adaptor components Hsiao Chien Sung
2023-09-27 10:29   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 14/20] drm/mediatek: Add component ID to component match structure Hsiao Chien Sung
2023-09-27 10:42   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 15/20] drm/mediatek: Manage component's clock with function pointers Hsiao Chien Sung
2023-09-28  1:26   ` CK Hu (胡俊光) [this message]
2023-09-11  7:42 ` [RESEND PATCH v6 16/20] drm/mediatek: Make sure the power-on sequence of LARB and RDMA Hsiao Chien Sung
2023-09-28  2:32   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 17/20] drm/mediatek: Support MT8188 Padding in display driver Hsiao Chien Sung
2023-09-28  3:05   ` CK Hu (胡俊光)
2023-09-28  3:39     ` Shawn Sung (宋孝謙)
2023-09-28 10:24       ` AngeloGioacchino Del Regno
2023-10-03  1:29         ` Shawn Sung (宋孝謙)
2023-09-11  7:42 ` [RESEND PATCH v6 18/20] drm/mediatek: Add Padding to OVL adaptor Hsiao Chien Sung
2023-09-28  6:17   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 19/20] drm/mediatek: Support MT8188 VDOSYS1 in display driver Hsiao Chien Sung
2023-09-28  6:47   ` CK Hu (胡俊光)
2023-09-11  7:42 ` [RESEND PATCH v6 20/20] drm/mediatek: Set DPI input to 1T2P mode Hsiao Chien Sung
2023-09-11 11:28   ` AngeloGioacchino Del Regno

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=d913ce854c9951c3393dda13b91e210a994893ad.camel@mediatek.com \
    --to=ck.hu@mediatek.com \
    --cc=Jason-JH.Lin@mediatek.com \
    --cc=Nancy.Lin@mediatek.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=Shawn.Sung@mediatek.com \
    --cc=Singo.Chang@mediatek.com \
    --cc=airlied@gmail.com \
    --cc=angelogioacchino.delregno@collabora.com \
    --cc=conor+dt@kernel.org \
    --cc=daniel@ffwll.ch \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=matthias.bgg@gmail.com \
    --cc=nfraprado@collabora.com \
    --cc=p.zabel@pengutronix.de \
    --cc=robh+dt@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®