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Mon, 02 Nov 2026 21:29:28 -0800 (PST) Received: from [10.239.96.176] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2eb3922f56bsm35371005ad.16.2026.11.02.21.29.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Nov 2026 21:29:27 -0800 (PST) Message-ID: Date: Tue, 3 Nov 2026 13:29:21 +0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 5/5] media: qcom: camss: Add support for Hawi To: Bryan O'Donoghue , Bryan O'Donoghue , Nihal Kumar Gupta , Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Vladimir Zapolskiy , Mauro Carvalho Chehab Cc: Suresh Vankadara , Vikram Sharma , linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-media@vger.kernel.org References: <20261030-hawi-maili-camss-v3-0-9742bca8cef2@oss.qualcomm.com> <20261030-hawi-maili-camss-v3-5-9742bca8cef2@oss.qualcomm.com> <5817be6b-7180-407b-acb5-8c5fdef4edfb@kernel.org> <73b1f591-69cf-471b-9763-a0b719c74501@oss.qualcomm.com> Content-Language: en-US From: Hangxiang Ma In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Info: AW1haW4tMjYxMTAzMDAyMSBTYWx0ZWRfX7qFAzJL5GHrC x2X0wTHfLvJNNfCU9OZGSw6LBoaK8A4l5KGXhMmY2VDNPtnm8cwrajEzuNrjHapEnl8Q9czSsT/ cK2UuBGxEA0XzicU5gcTHcrTqlqKdDc= X-Proofpoint-ORIG-GUID: L-fwV46-NBPr6q7psiHAVQqif6200dFs X-Authority-Analysis: v=2.4 cv=F73C5ahN c=1 sm=1 tr=0 ts=6ae97139 cx=c_pps a=MTSHoo12Qbhz2p7MsH1ifg==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=zJRp6_cAMcgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=e403w2VLNo3D9SQJzk0A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=GvdueXVYPmCkWapjIL-Q:22 X-Proofpoint-GUID: L-fwV46-NBPr6q7psiHAVQqif6200dFs X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMTAzMDAyMSBTYWx0ZWRfX8jLxA5VDegjv +wuYc8E6vRvmVfn0/92m47dogwGiXVWM+AaRMefgdiINvNKpib9XzGVqk/xkSSVpzZkwTN3mlJH rl+L7Netqkf92N+KCxNDZUsv898+bi41ReNBNcKbrRFgIAGu5jSapP3Tge1+nzvijlRoDlnXTr/ TQpDx6O5AKx3DHyR39isMuGu+eX5xUJLEei5WeWjpXVSMVzCTgdtqiA/T62La+eCqsogaErpr/a 0D4iH+m1LueHHIVn4L9YQ6ahkR0BVgegH5LnSyIL4VjouNJMWV8jc+58iEfoCPvWuAIWQ0C+SZ2 0+MmbgpmgdmIIXm9MkLbNKr56dzTBphD0oXf2PEAb8x5JDj8nzEbydmuOg8+zqjviRaD35kAgcJ 8kK9VuVOFLzfRw4NyPQj8stzMecSa2jdSz27FgUm5kiO8NZ/qWQBzlDHgR1JuYaF8OKYR/O1fdR jBbVBKqrxtimIJZDy3w== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-11-03_01,2026-11-02_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 phishscore=0 lowpriorityscore=0 spamscore=0 bulkscore=0 clxscore=1015 impostorscore=0 adultscore=0 suspectscore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610300000 definitions=main-2611030021 On 11/2/2026 8:58 PM, Bryan O'Donoghue wrote: > On 30/10/2026 15:25, Hangxiang Ma wrote: >>> On 30/10/2026 12:43, Nihal Kumar Gupta wrote: >>>> +static const struct camss_subdev_resources csid_res_hawi[] = { >>>> +    /* CSID0 */ >>>> +    { >>>> +        .clock = { "csid", "csid_csiphy_rx" }, >>>> +        .clock_rate = { { 480000000 }, >>>> +                { 480000000 } }, >>>> +        .reg = { "csid0" }, >>>> +        .interrupt = { "csid0" }, >>>> +        .csid = { >>>> +            .parent_dev_ops = &vfe_parent_dev_ops, >>>> +            .hw_ops = &csid_ops_1190, >>>> +            .formats = &csid_formats_gen2 >>>> +        } >>> >>> This looks strange, why is there only one clock rate ? >>> >>> --- >>> bod >> Hi Bryan, the current CAMSS CSID code always selects the first >> frequency listed for each clock in the CAMSS resource table. >> >> In camss-csid.c: >> >> [...] >> } else if (clock->nfreqs) { >>          clk_set_rate(clock->clk, clock->freq[0]); >> } >> [...] >> >> For the CSID and CSID_CSIPHY_RX clocks, the hardware supports three >> clock rates: 200 MHz, 300 MHz, and 480 MHz. If I remember correctly, >> 200MHz and 300 MHz is not sufficient for the sensor's output pixel >> rate, so we need to use the highest rate, 480 MHz, to meet the >> bandwidth requirement. Thanks a lot. >> >> --- >> Best Regards, >> Hangxiang > > We have a series from Antans to address this though. > > We should list the clocks the SoC supports not constrain that list for > one specific sensor on a test-case. > > --- > bod Good to know that Antans has a series addressing this. I agree that we should list all the clock rates supported by the SoC rather than constraining them for a specific sensor. One additional concern: if the clock selection logic still always picks freq[0], listing a lower rate first could leave CAMSS unable to work properly with sensors that need higher bandwidth. Could you please share the link to the series? I'll rebase the next revision on top of it. --- Best Regards, Hangxiang