Re: [PATCH] cxl/region: Restore passthrough decoder enable on region re-assembly

[Dave Jiang <dave.jiang@intel.com>]

On 7/27/26 3:37 AM, Richard Cheng wrote:
> After a CXL endpoint is PCI hot-removed and the bus rescanned, an
> auto-discovered region fails to rebiuld and is lost, evne though the

rebuild
even

> device's HDM decoder is still committed and decoding.

If we truly do a PCI hot-remove and re-insert, the endpoint device would be reset and disabled. Not sure how it would still be decoding. Also, a complete different device with possibly different size can be inserted. And the device showed up would be unconfigured. Given there's no BIOS to program the device since the OS has taken over, should it be still considered part of the auto-region?

Any thoughts Jonathan?

> 
> A single-dport host bridge/root port has no HDM decoder capability, so
> its switch decoder is a SW-only passthrough. Its CXL_DECODER_F_ENABLE
> flag is cleared on region teardown and never restored on rescan, so
> cxl_port_setup_targets() fails with -ENXIO.
> 
> Re-enable the passthrough decoder when its interleave and HPA config
> still match the region, it holds no HW state.
> 
> Signed-off-by: Richard Cheng <icheng@nvidia.com>
> ---
>  drivers/cxl/core/region.c | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
> index 1e211542b6b6..011ceb5bae79 100644
> --- a/drivers/cxl/core/region.c
> +++ b/drivers/cxl/core/region.c
> @@ -1574,6 +1574,19 @@ static int cxl_port_setup_targets(struct cxl_port *port,
>  	}
>  
>  	if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) {
> +		/*
> +		 * A passthrough switch decoder holds no HW decode state.
> +		 * It's CXL_DECODER_F_ENABLE flag is pure software bookkeeping
> +		 * that is cleared when the region is torn down. On auto-discovery
> +		 * re-assembly after a subsequent rescan the decode config still
> +		 * matches the region, so restore the flag rather than fail to
> +		 * rebuild a region that HW is in fact still decoding.
> +		 */
> +		if (!cxld->commit && cxld->interleave_ways == iw &&
> +		    (iw <= 1 || cxld->interleave_granularity == ig) &&
> +		    spa_maps_hpa(p, &cxld->hpa_range))
> +			cxld->flags |= CXL_DECODER_F_ENABLE;
> +
>  		if (cxld->interleave_ways != iw ||
>  		    (iw > 1 && cxld->interleave_granularity != ig) ||
>  		    !spa_maps_hpa(p, &cxld->hpa_range) ||
> 
> base-commit: 4539944e515183668109bdf4d0c3d7d228383d88