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From: zhukeqian <zhukeqian1@huawei.com>
To: Steven Price <steven.price@arm.com>,
	<linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<kvmarm@lists.cs.columbia.edu>, <kvm@vger.kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Sean Christopherson <sean.j.christopherson@intel.com>,
	<liangpeng10@huawei.com>,
	Alexios Zavras <alexios.zavras@intel.com>,
	Mark Brown <broonie@kernel.org>, Marc Zyngier <maz@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Will Deacon <will@kernel.org>,
	Andrew Morton <akpm@linux-foundation.org>
Subject: Re: [PATCH 03/12] KVM: arm64: Report hardware dirty status of stage2 PTE if coverred
Date: Thu, 2 Jul 2020 19:28:33 +0800	[thread overview]
Message-ID: <d994811b-ca95-236e-b2b0-461ab4f1f065@huawei.com> (raw)
In-Reply-To: <a73952ac-5e81-6c05-9b21-734e25250845@arm.com>

Hi Steven,

On 2020/7/1 19:28, Steven Price wrote:
> Hi,
> 
> On 16/06/2020 10:35, Keqian Zhu wrote:
>> kvm_set_pte is called to replace a target PTE with a desired one.
>> We always do this without changing the desired one, but if dirty
>> status set by hardware is coverred, let caller know it.
>>
>> Signed-off-by: Keqian Zhu <zhukeqian1@huawei.com>
>> ---
>>   arch/arm64/kvm/mmu.c | 36 +++++++++++++++++++++++++++++++++++-
>>   1 file changed, 35 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
>> index 5ad87bce23c0..27407153121b 100644
>> --- a/arch/arm64/kvm/mmu.c
>> +++ b/arch/arm64/kvm/mmu.c
>> @@ -194,11 +194,45 @@ static void clear_stage2_pmd_entry(struct kvm *kvm, pmd_t *pmd, phys_addr_t addr
>>       put_page(virt_to_page(pmd));
>>   }
>>   -static inline void kvm_set_pte(pte_t *ptep, pte_t new_pte)
>> +#ifdef CONFIG_ARM64_HW_AFDBM
>> +/**
>> + * @ret: true if dirty status set by hardware is coverred.
> 
> NIT: s/coverred/covered/, this is in several places.
> 
OK.
>> + */
>> +static bool kvm_set_pte(pte_t *ptep, pte_t new_pte)
>> +{
>> +    pteval_t old_pteval, new_pteval, pteval;
>> +    bool old_logging, new_no_write;
>> +
>> +    old_logging = kvm_hw_dbm_enabled() && !pte_none(*ptep) &&
>> +              kvm_s2pte_dbm(ptep);
>> +    new_no_write = pte_none(new_pte) || kvm_s2pte_readonly(&new_pte);
>> +
>> +    if (!old_logging || !new_no_write) {
>> +        WRITE_ONCE(*ptep, new_pte);
>> +        dsb(ishst);
>> +        return false;
>> +    }
>> +
>> +    new_pteval = pte_val(new_pte);
>> +    pteval = READ_ONCE(pte_val(*ptep));
> 
> This usage of *ptep looks wrong - it's read twice using READ_ONCE (once in kvm_s2pte_dbm()) and once without any decoration (in the pte_none() call). Which looks a bit dodgy and at the very least needs some justification. AFAICT you would be better taking a local copy and using that rather than reading from memory repeatedly.
> 
oh yes. Here we can use a local copy to get higher performance.

I am not sure here has problem about correctness. I *think* we should always acquire corresponding lock before manipulate PTs,
so there is no other agent will update PTs during our several PTs access (except MMU, but it just modifies AF and [S2]AP) .
But do I miss something?

>> +    do {
>> +        old_pteval = pteval;
>> +        pteval = cmpxchg_relaxed(&pte_val(*ptep), old_pteval, new_pteval);
>> +    } while (pteval != old_pteval);
> This look appears to be reinventing xchg_relaxed(). Any reason we can't just use xchg_relaxed()? Also we had a dsb() after the WRITE_ONCE but you are using the _relaxed variant here. What is the justification for not having a barrier?
> 
Aha, I have changed the code for several times and it is equal to xchg_relaxed now, thanks.

I use _relaxd here because I am not clear about the reason that we use _relaxed in kvm_set_s2XXX_XXX and use dsb() in kvm_set_pte.
But I will correct this in patch v2.
>> +
>> +    return !kvm_s2pte_readonly(&__pte(pteval));
>> +}
>> +#else
>> +/**
>> + * @ret: true if dirty status set by hardware is coverred.
>> + */
>> +static inline bool kvm_set_pte(pte_t *ptep, pte_t new_pte)
>>   {
>>       WRITE_ONCE(*ptep, new_pte);
>>       dsb(ishst);
>> +    return false;
>>   }
>> +#endif /* CONFIG_ARM64_HW_AFDBM */
> 
> You might be able to avoid this #ifdef by redefining old_logging as:
> 
>   old_logging = IS_ENABLED(CONFIG_ARM64_HW_AFDBM) && ...
> 
> I *think* the compiler should be able to kill the dead code and leave you with just the above when the config symbol is off.
> 
After my test, you are right ;-) .


Thanks,
Keqian
> Steve
> 
>>     static inline void kvm_set_pmd(pmd_t *pmdp, pmd_t new_pmd)
>>   {
>>
> 
> .
> 

  reply	other threads:[~2020-07-02 11:28 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-16  9:35 [PATCH 00/12] KVM: arm64: Support stage2 hardware DBM Keqian Zhu
2020-06-16  9:35 ` [PATCH 01/12] KVM: arm64: Add some basic functions to support hw DBM Keqian Zhu
2020-06-16  9:35 ` [PATCH 02/12] KVM: arm64: Modify stage2 young mechanism " Keqian Zhu
2020-06-16  9:35 ` [PATCH 03/12] KVM: arm64: Report hardware dirty status of stage2 PTE if coverred Keqian Zhu
2020-07-01 11:28   ` Steven Price
2020-07-02 11:28     ` zhukeqian [this message]
2020-06-16  9:35 ` [PATCH 04/12] KVM: arm64: Support clear DBM bit for PTEs Keqian Zhu
2020-06-16  9:35 ` [PATCH 05/12] KVM: arm64: Add KVM_CAP_ARM_HW_DIRTY_LOG capability Keqian Zhu
2020-06-16  9:35 ` [PATCH 06/12] KVM: arm64: Set DBM bit of PTEs during write protecting Keqian Zhu
2020-06-16  9:35 ` [PATCH 07/12] KVM: arm64: Scan PTEs to sync dirty log Keqian Zhu
2020-06-16  9:35 ` [PATCH 08/12] KVM: Omit dirty log sync in log clear if initially all set Keqian Zhu
2020-06-16  9:35 ` [PATCH 09/12] KVM: arm64: Steply write protect page table by mask bit Keqian Zhu
2020-06-16  9:35 ` [PATCH 10/12] KVM: arm64: Save stage2 PTE dirty status if it is coverred Keqian Zhu
2020-06-16  9:35 ` [PATCH 11/12] KVM: arm64: Support disable hw dirty log after enable Keqian Zhu
2020-06-16  9:35 ` [PATCH 12/12] KVM: arm64: Enable stage2 hardware DBM Keqian Zhu
2020-06-18  4:13 ` [PATCH 00/12] KVM: arm64: Support " zhukeqian

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