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Sun, 01 Nov 2026 18:41:34 -0800 (PST) Received: from [192.168.86.23] ([136.25.189.61]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1ac1854da78sm38514927c88.6.2026.11.01.18.41.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 01 Nov 2026 18:41:34 -0800 (PST) Message-ID: Date: Sun, 1 Nov 2026 18:41:33 -0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/4] platform/x86/amd/hsmp: Add pwr_current_active_freq_limit_source_raw To: Erwan Velu , platform-driver-x86@vger.kernel.org Cc: Naveen Krishna Chatradhi , Carlos Bilbao , Hans de Goede , =?UTF-8?Q?Ilpo_J=C3=A4rvinen?= , linux-kernel@vger.kernel.org References: <20261007125908.321186-1-erwanaliasr1@gmail.com> <20261007125908.321186-5-erwanaliasr1@gmail.com> Content-Language: en-US From: Carlos Bilbao In-Reply-To: <20261007125908.321186-5-erwanaliasr1@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 10/7/26 05:59, Erwan Velu wrote: > From: Erwan Velu > > pwr_current_active_freq_limit_source reports the active frequency limit > sources as a list of names, one per line, which metrics exporters have > to parse and map back to a value. > > Add pwr_current_active_freq_limit_source_raw, reporting the same source > bitmask as a single hexadecimal value. Exporters only need a plain > integer conversion, and its interpretation can be centralized in the > monitoring stack, e.g. with Grafana value mappings, instead of being > decoded on each server. > > The bit assignment is defined by the HSMP specification and is stable: > new limit sources are only appended, existing bits never change meaning. > A given value therefore has a single interpretation, whatever the > platform or kernel version it comes from. > > Assisted-by: claude-opus-5-5 > Signed-off-by: Erwan Velu Acked-by: Carlos Bilbao > --- > Documentation/arch/x86/amd_hsmp.rst | 4 ++++ > drivers/platform/x86/amd/hsmp/sysfs.c | 18 ++++++++++++++++++ > 2 files changed, 22 insertions(+) > > diff --git a/Documentation/arch/x86/amd_hsmp.rst b/Documentation/arch/x86/amd_hsmp.rst > index 954e938eea3d..66dbf506db05 100644 > --- a/Documentation/arch/x86/amd_hsmp.rst > +++ b/Documentation/arch/x86/amd_hsmp.rst > @@ -109,6 +109,10 @@ Following sysfs files are available at /sys/devices/amd_hsmp/socket%d/. > in MHz. > * pwr_current_active_freq_limit_source: Source of current active frequency > limit. > +* pwr_current_active_freq_limit_source_raw: Source of current active > + frequency limit, as a hexadecimal bitmask. Bits 0 to 7 are, in order: > + cHTC-Active, PROCHOT, TDC limit, PPT Limit, OPN Max, Reliability Limit, > + APML Agent, HSMP Agent. > > ACPI device object format > ========================= > diff --git a/drivers/platform/x86/amd/hsmp/sysfs.c b/drivers/platform/x86/amd/hsmp/sysfs.c > index e9e91b640b2a..fa1cf8dc3b6f 100644 > --- a/drivers/platform/x86/amd/hsmp/sysfs.c > +++ b/drivers/platform/x86/amd/hsmp/sysfs.c > @@ -274,6 +274,21 @@ static ssize_t hsmp_freq_limit_source_show(struct device *dev, struct device_att > return len; > } > > +static ssize_t hsmp_freq_limit_source_raw_show(struct device *dev, > + struct device_attribute *attr, char *buf) > +{ > + struct hsmp_sys_attr *hattr = to_hsmp_sys_attr(attr); > + struct hsmp_socket *sock = dev_get_drvdata(dev); > + u32 data; > + int ret; > + > + ret = hsmp_msg_get_nargs(sock->sock_ind, hattr->msg_id, &data, 1); > + if (ret) > + return ret; > + > + return sysfs_emit(buf, "0x%04lx\n", FIELD_GET(FREQ_SRC_IND_MASK, data)); > +} > + > static const struct bin_attribute hsmp_metric_tbl_attr = { > .attr = { .name = HSMP_METRICS_TABLE_NAME, .mode = 0444}, > .read = hsmp_metric_tbl_acpi_read, > @@ -307,6 +322,8 @@ HSMP_DEV_ATTR(pwr_current_active_freq_limit, HSMP_GET_SOCKET_FREQ_LIMIT, > hsmp_freq_limit_show, 0444); > HSMP_DEV_ATTR(pwr_current_active_freq_limit_source, HSMP_GET_SOCKET_FREQ_LIMIT, > hsmp_freq_limit_source_show, 0444); > +HSMP_DEV_ATTR(pwr_current_active_freq_limit_source_raw, HSMP_GET_SOCKET_FREQ_LIMIT, > + hsmp_freq_limit_source_raw_show, 0444); > > static struct attribute *hsmp_dev_attr_list[] = { > &hattr_c0_residency_input.dattr.attr, > @@ -323,6 +340,7 @@ static struct attribute *hsmp_dev_attr_list[] = { > &hattr_clk_fmin.dattr.attr, > &hattr_pwr_current_active_freq_limit.dattr.attr, > &hattr_pwr_current_active_freq_limit_source.dattr.attr, > + &hattr_pwr_current_active_freq_limit_source_raw.dattr.attr, > NULL > }; >