From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EECD1EB64D8 for ; Wed, 21 Jun 2023 22:35:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229759AbjFUWf5 (ORCPT ); Wed, 21 Jun 2023 18:35:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43836 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229563AbjFUWfz (ORCPT ); Wed, 21 Jun 2023 18:35:55 -0400 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F053173F for ; Wed, 21 Jun 2023 15:35:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1687386954; x=1718922954; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=arRQykyRvQ3HgEr5GE5iYhHj4FTPGnwjfQagWxDSJuM=; b=do+s8xZLN7CoP+XFv2KiEO/v83/70zqb2kZNT+XOrRqM2N1jVG+WRBWb D81ThS5+ttmiVFrntHTTP2iI0WUxiVxHXKz7JLpq/3cQKwSraST+rKqrN VR7YfM9ymxx8z9DtwfLvwkgaE9+JkX5SkV6cMe0lMc3LA4skzuiXliCNc 4jVvbv45b3pBBksv6eYHFzKFF1Z4WU7HAHOZK7s/aO5mePsSWObFpO7Rk 6aLzPsyNaQtdOuOjnG3iVZ/lNp6v9lGc96XFPjlSSboDhmHb31Ngvkk+F vI0bZmY1qLD8/9qv6a0XQ4/Au1Xbxka0CBPfbY1PDGF3HFqbjKuCxNqdx w==; X-IronPort-AV: E=McAfee;i="6600,9927,10748"; a="339936509" X-IronPort-AV: E=Sophos;i="6.00,261,1681196400"; d="scan'208";a="339936509" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2023 15:35:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10748"; a="744378906" X-IronPort-AV: E=Sophos;i="6.00,261,1681196400"; d="scan'208";a="744378906" Received: from rmathew-mobl2.amr.corp.intel.com (HELO [10.212.134.235]) ([10.212.134.235]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Jun 2023 15:35:46 -0700 Message-ID: Date: Wed, 21 Jun 2023 15:35:45 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH v2] x86/bugs: Break down mitigations configurations Content-Language: en-US To: Pawan Gupta , Breno Leitao Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Josh Poimboeuf , leit@fb.com, "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" References: <20230616164851.2559415-1-leitao@debian.org> <20230621001327.qdyebewnx7r5aiy3@desk> <20230621173135.wiprtgzslhw5z5or@desk> <20230621194101.bmwesljror2yqjxx@desk> From: Dave Hansen In-Reply-To: <20230621194101.bmwesljror2yqjxx@desk> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/21/23 12:41, Pawan Gupta wrote: > Yes, a single series (or a patch) that adds config for each mitigation > would be good. Do people _really_ want per-mitigation compile-time controls? That seems like kinda a pain. I Boris suggested it, but it seems like a _bit_ of overkill to me. Would a compile-time option that just defaulted _everything_ to mitigations=off behavior work instead? That way we don't end up with a billion new config options.