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From: Laurentiu Mihalcea <laurentiumihalcea111@gmail.com>
To: Peng Fan <peng.fan@oss.nxp.com>, Joy Zou <joy.zou@nxp.com>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>, Frank Li <Frank.Li@nxp.com>,
	Peng Fan <peng.fan@nxp.com>, Ye Li <ye.li@nxp.com>,
	devicetree@vger.kernel.org, imx@lists.linux.dev,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Subject: Re: [PATCH v3 1/2] arm64: dts: imx95: Reserve eDMA channels 0-1 for V2X
Date: Tue, 3 Feb 2026 02:16:57 -0800	[thread overview]
Message-ID: <d9c72c09-0b10-4b5a-a49a-ec93764bdbab@gmail.com> (raw)
In-Reply-To: <aYAYeQaGK2RUFQs6@shlinux89>


On 2/1/2026 7:22 PM, Peng Fan wrote:
> Hi Joy,
>
> Sorry to jump in at V3.
>
> On Fri, Jan 30, 2026 at 05:36:27PM +0800, Joy Zou wrote:
>> Reserve eDMA channels 0 and 1 on the AXI eDMA controller for exclusive
>> use by V2X (Vehicle-to-Everything) fast hash operations.
>>
>> Reviewed-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
>> Tested-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
>> Signed-off-by: Joy Zou <joy.zou@nxp.com>
>> ---
>> arch/arm64/boot/dts/freescale/imx95.dtsi | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi
>> index 55e2da094c889fc7c1096d0e36f31ae118d2a982..9ac82da2ff440e08ae8378d7ff830a568d50a354 100644
>> --- a/arch/arm64/boot/dts/freescale/imx95.dtsi
>> +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi
>> @@ -631,6 +631,8 @@ edma2: dma-controller@42000000 {
>> 				reg = <0x42000000 0x210000>;
>> 				#dma-cells = <3>;
>> 				dma-channels = <64>;
>> +				/* channels 0 and 1 reserved for V2X fast hash */
>> +				dma-channel-mask = <0x3>;
> This is wrong. Per dt-binding,
> dma-channel-mask means Bitmask of available DMA channels in ascending order,
> The usage in this patch does not match the dt-binding.


Ah, good catch. It would seem like our EDMA driver reverses the meaning of the "dma-channel-mask"

bits (i.e. bit x set means channel x reserved instead of channel x available).


Now, I wonder how we should be proceeding with this. According to the DT binding, our devicetree

configurations are wrong. Since there seem to be only 8 upstream instances in which this property is

being used I guess it wouldn't be so difficult to correct the driver's behavior and then correct the

devicetrees?


  reply	other threads:[~2026-02-03 10:17 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-30  9:36 [PATCH v3 0/2] " Joy Zou
2026-01-30  9:36 ` [PATCH v3 1/2] arm64: dts: imx95: " Joy Zou
2026-02-02  3:22   ` Peng Fan
2026-02-03 10:16     ` Laurentiu Mihalcea [this message]
2026-01-30  9:36 ` [PATCH v3 2/2] arm64: dts: imx95-evk: update the dma-channel-mask property Joy Zou

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