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From: E Shattow <e@freeshell.de>
To: Owen O'Hehir <oo.hehir@gmail.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	linux-rtc@vger.kernel.org
Cc: "Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Emil Renner Berthing" <kernel@esmil.dk>,
	"Paul Walmsley" <pjw@kernel.org>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alexandre Ghiti" <alex@ghiti.fr>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	"Hal Feng" <hal.feng@starfivetech.com>,
	"ziv.xu" <ziv.xu@starfivetech.com>,
	"Conor Dooley" <conor@kernel.org>,
	"Uwe Kleine-König" <u.kleine-koenig@baylibre.com>
Subject: Re: [PATCH v2 4/4] riscv: dts: starfive: jh7110: Add the RTC node
Date: Sun, 8 Nov 2026 19:37:34 -0800	[thread overview]
Message-ID: <d9f4a750-5f9d-4749-929e-330c8776971e@freeshell.de> (raw)
In-Reply-To: <20261108212826.15890-5-oo.hehir@gmail.com>

Hi Owen,

On 11/8/26 13:28, Owen O'Hehir wrote:
> Tested on a VisionFive 2 v1.3B.
> 
> Signed-off-by: Owen O'Hehir <oo.hehir@gmail.com>
> ---
>  arch/riscv/boot/dts/starfive/jh7110.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> index 82ea63f71..14f92b942 100644
> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
> @@ -1206,6 +1206,20 @@ pwrc: power-controller@17030000 {
>  			#power-domain-cells = <1>;
>  		};
>  
> +		rtc: rtc@17040000 {
> +			compatible = "starfive,jh7110-rtc";
> +			reg = <0x0 0x17040000 0x0 0x10000>;
> +			interrupts = <10>, <11>, <12>;
> +			interrupt-names = "ms-pulse", "sec-pulse", "rtc";
> +			clocks = <&aoncrg JH7110_AONCLK_RTC_APB>,
> +				 <&aoncrg JH7110_AONCLK_RTC_CAL>,
> +				 <&aoncrg JH7110_AONCLK_RTC_32K>;
> +			clock-names = "apb", "cal", "32k";
> +			resets = <&aoncrg JH7110_AONRST_RTC_32K>,
> +				 <&aoncrg JH7110_AONRST_RTC_APB>,
> +				 <&aoncrg JH7110_AONRST_RTC_CAL>;
> +		};
> +
>  		csi2rx: csi@19800000 {
>  			compatible = "starfive,jh7110-csi2rx", "cdns,csi2rx";
>  			reg = <0x0 0x19800000 0x0 0x10000>;

Is status property applicable to SoC rtc? If not, then is 'rtc' label
appropriate when there's no status applicable?

Note that Mars CM / CM-Lite System-on-Modules may be used commonly with
board carriers which implement a battery-backed RTC on the I2C bus, and
so another 'rtc' label may be applicable, something to consider. The
initial Mars CM / CM-Lite dts ignores this because there is an
inconvenient I2C bus device address conflict of the SoM EEPROM and some
carrier boards' RTC, and the SoC RTC driver was not then present;
problems for a future self.

-E

      reply	other threads:[~2026-11-09  3:38 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-11-08 21:28 [PATCH v2 0/4] rtc: Add StarFive JH7110 RTC support Owen O'Hehir
2026-11-08 21:28 ` [PATCH v2 1/4] dt-bindings: rtc: Add StarFive JH7110 RTC Owen O'Hehir
2026-11-08 22:56   ` Conor Dooley
2026-11-08 21:28 ` [PATCH v2 2/4] rtc: Add StarFive JH7110 RTC driver Owen O'Hehir
2026-11-09  3:12   ` E Shattow
2026-11-08 21:28 ` [PATCH v2 3/4] MAINTAINERS: Add entry for the " Owen O'Hehir
2026-11-08 21:28 ` [PATCH v2 4/4] riscv: dts: starfive: jh7110: Add the RTC node Owen O'Hehir
2026-11-09  3:37   ` E Shattow [this message]

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