From: Krzysztof Kozlowski <krzk@kernel.org>
To: wangseok.lee@samsung.com,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"kishon@ti.com" <kishon@ti.com>,
"vkoul@kernel.org" <vkoul@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"jesper.nilsson@axis.com" <jesper.nilsson@axis.com>,
"lars.persson@axis.com" <lars.persson@axis.com>
Cc: "bhelgaas@google.com" <bhelgaas@google.com>,
"linux-phy@lists.infradead.org" <linux-phy@lists.infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
"kw@linux.com" <kw@linux.com>,
"linux-arm-kernel@axis.com" <linux-arm-kernel@axis.com>,
"kernel@axis.com" <kernel@axis.com>, 전문기 <moonki.jun@samsung.com>
Subject: Re: [PATCH 4/5] phy: Add ARTPEC-8 PCIe PHY driver
Date: Mon, 28 Mar 2022 15:08:42 +0200 [thread overview]
Message-ID: <da2351be-1fca-4269-cb7b-9dcd6a01b2dc@kernel.org> (raw)
In-Reply-To: <20220328021832epcms2p6b6294b824c64404c437d0fd7f09369a4@epcms2p6>
On 28/03/2022 04:18, 이왕석 wrote:
> Add support Axis, ARTPEC-8 SoC.
> ARTPEC-8 is the SoC platform of Axis Communications.
> This is based on arm64 and support GEN4 & 2lane.
> This driver provides PHY interface for ARTPEC-8 SoC PCIe controller,
> based on Samsung PCIe PHY IP.
>
You already sent it on 28th of January and did not respond to my comments.
Please do not resend same/similar code, but instead respond to comments
received earlier.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-03-28 13:09 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20220328021832epcms2p6b6294b824c64404c437d0fd7f09369a4@epcms2p6>
2022-03-28 2:18 ` 이왕석
2022-03-28 13:08 ` Krzysztof Kozlowski [this message]
[not found] ` <CGME20220328021832epcms2p6b6294b824c64404c437d0fd7f09369a4@epcms2p2>
2022-03-29 6:22 ` 이왕석
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