From: Andrew Cooper <andrew.cooper3@citrix.com>
To: Borislav Petkov <bp@alien8.de>, X86 ML <x86@kernel.org>
Cc: LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86/retbleed: Add __x86_return_thunk alignment checks
Date: Mon, 15 May 2023 15:14:41 +0100 [thread overview]
Message-ID: <da39b4a0-5bf9-c204-ee27-a7d3eebdc3f8@citrix.com> (raw)
In-Reply-To: <20230515140726.28689-1-bp@alien8.de>
On 15/05/2023 3:07 pm, Borislav Petkov wrote:
> diff --git a/arch/x86/kernel/vmlinux.lds.S b/arch/x86/kernel/vmlinux.lds.S
> index 25f155205770..03c885d3640f 100644
> --- a/arch/x86/kernel/vmlinux.lds.S
> +++ b/arch/x86/kernel/vmlinux.lds.S
> @@ -508,4 +508,8 @@ INIT_PER_CPU(irq_stack_backing_store);
> "fixed_percpu_data is not at start of per-cpu area");
> #endif
>
> +#ifdef CONFIG_RETHUNK
> +. = ASSERT((__x86_return_thunk & 0x3f) == 0, "__x86_return_thunk not cacheline-aligned");
Probably best to say 64b aligned. The safety property is to do with the
layout of the BTB, not of a cacheline.
FWIW,
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
next prev parent reply other threads:[~2023-05-15 14:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-15 14:07 Borislav Petkov
2023-05-15 14:14 ` Andrew Cooper [this message]
2023-05-17 10:30 ` [tip: x86/cpu] " tip-bot2 for Borislav Petkov (AMD)
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