From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from canpmsgout04.his.huawei.com (canpmsgout04.his.huawei.com [113.46.200.219]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB57E41DED7 for ; Thu, 16 Jul 2026 12:28:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.219 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784204915; cv=none; b=DhzQqXtREC8+IFskhJ8Pg2BKWmHkZrCSdu/AI0Lm+jmPNXaehMB1wKzeENv1rICZ6qR296ZiZfmcPnAuNq+Sg/d3pqptM08WpGYzZ2xScpIayFDBzSN5B1hxXVJiWs4VvIwDCeNCfMo+yJbv1ih9FalVunT7D309kzWF75CFBQE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1784204915; c=relaxed/simple; bh=Ec5Bct9wT7p1/DFJc1rVYlyd4rr8WphP0MdpwuqWN4M=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=UgLxLwHX7t5EinUAbDRxdhA8GsbrHPRIooKuQouKr2XYHUqd4Swz2bAnliiEwxfesDgXiGYD0zdelxeFmnSvu/R/derTIMvQZV8dwgBgd42YTLFMOZTGDFDKfKzE6bDimmVjV0ANeSTjF3A2NZkTm95IJfW1M+BFD5fhJY4uXfg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=6ZTP5tGW; arc=none smtp.client-ip=113.46.200.219 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="6ZTP5tGW" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=u1+I9oAT2GKmfFvO1KGrOu3B12dW4RJJI8mhhbyQJI4=; b=6ZTP5tGWLe0WcsF+pN221kNiLcHSPmfSkv99Gcbcj2t9RoTV1f5MACEwp3EqNr8pqwZ+p2SrA ixmKd8bwGfGvB2im7+ZxDesMOEhQxyAeQRAE6z8Hn3YOLx9LGnjYmDtuDXYr+LD/h4nCPEvYbUc S/j6bXR6eeHZNhYzdJT4sYk= Received: from mail.maildlp.com (unknown [172.19.163.0]) by canpmsgout04.his.huawei.com (SkyGuard) with ESMTPS id 4h1Bt31yCCz1prKd; Thu, 16 Jul 2026 20:19:07 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 5D75540537; Thu, 16 Jul 2026 20:28:28 +0800 (CST) Received: from [10.67.109.254] (10.67.109.254) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Thu, 16 Jul 2026 20:28:27 +0800 Message-ID: Date: Thu, 16 Jul 2026 20:28:26 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] arm64: syscall: Ensure saved x0 is kept in-sync with tracer updates To: Will Deacon , CC: , Kees Cook , Mark Rutland , Yiqi Sun , Catalin Marinas References: <20260716120640.6590-1-will@kernel.org> From: Jinjie Ruan In-Reply-To: <20260716120640.6590-1-will@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: kwepems200002.china.huawei.com (7.221.188.68) To dggpemf500011.china.huawei.com (7.185.36.131) On 7/16/2026 8:06 PM, Will Deacon wrote: > When seccomp support was originally added to arm64 in a1ae65b21941 > ("arm64: add seccomp support"), seccomp was erroneously called _before_ > the ptrace syscall-enter-stop and therefore the tracer could trivially > manipulate the syscall register state after the seccomp check had > passed. This was subsequently fixed in a5cd110cb836 ("arm64/ptrace: run > seccomp after ptrace") by moving the seccomp check after the tracer has > run. Unfortunately, a decade later, that fix has been reported to be > incomplete. > > On arm64, both the first argument to a syscall and its eventual return > value are allocated to register x0. In order to facilitate syscall > restarting and querying of syscall arguments on the syscall exit path, > the original value of x0 is stashed in 'struct pt_regs::orig_x0' early > during the syscall entry path and is returned for the first argument by > syscall_get_arguments(). Unlike 32-bit Arm, this stashed value is not > directly exposed via ptrace() and so changes to register x0 made by the > tracer on a syscall-enter-stop are not reflected in 'orig_x0'. This > means that seccomp, syscall tracepoints and audit can observe a stale > value for the register compared to the argument that will be observed by > the actual syscall. > > Re-sync 'orig_x0' from x0 on the syscall entry path following a > potential ptrace stop (i.e. PTRACE_EVENTMSG_SYSCALL_ENTRY or > SECCOMP_RET_TRACE). This behaviour is limited to native tasks (because > compat tasks expose 'orig_r0' to ptrace) where the syscall is not being > skipped (because x0 is updated to hold the return value of -ENOSYS in > that case). > > Cc: Kees Cook > Cc: Jinjie Ruan > Cc: Mark Rutland > Reported-by: Yiqi Sun > Link: https://lore.kernel.org/all/20260529065444.1336608-1-sunyiqixm@gmail.com/ > Suggested-by: Catalin Marinas > Fixes: a5cd110cb836 ("arm64/ptrace: run seccomp after ptrace") > Signed-off-by: Will Deacon > --- > > Changes since v1 (https://lore.kernel.org/r/20260714143600.23853-1-will@kernel.org): > * Reworded and expanded comments and commit message per Jinjie's > feedback > > arch/arm64/kernel/ptrace.c | 29 +++++++++++++++++++++++++++++ > 1 file changed, 29 insertions(+) > > diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c > index 4d08598e2891..390c9b2bd966 100644 > --- a/arch/arm64/kernel/ptrace.c > +++ b/arch/arm64/kernel/ptrace.c > @@ -2408,6 +2408,21 @@ static void report_syscall_exit(struct pt_regs *regs) > } > } > > +static void update_syscall_orig_x0_after_ptrace(struct pt_regs *regs) > +{ > + /* > + * Keep orig_x0 authoritative so that seccomp (via > + * syscall_get_arguments()), audit and the restart path all see the same > + * first argument the syscall is dispatched with, even if it has been > + * updated by a tracer. Skip this for NO_SYSCALL (set either by the user > + * or the tracer), as regs[0] holds the return value (see the comment in > + * el0_svc_common()) and can be unwound using syscall_rollback(). > + * For compat tasks, orig_r0 is provided directly through GPR index 17. > + */ > + if (!is_compat_task() && regs->syscallno != NO_SYSCALL) > + regs->orig_x0 = regs->regs[0]; > +} > + > int syscall_trace_enter(struct pt_regs *regs) > { > unsigned long flags = read_thread_flags(); > @@ -2417,12 +2432,26 @@ int syscall_trace_enter(struct pt_regs *regs) > ret = report_syscall_entry(regs); > if (ret || (flags & _TIF_SYSCALL_EMU)) > return NO_SYSCALL; > + > + /* > + * Ensure ptrace changes to x0 during a regular > + * syscall-enter-stop (PTRACE_SYSCALL) are visible to > + * subsequent seccomp checks, tracepoints and audit. > + */ > + update_syscall_orig_x0_after_ptrace(regs); > } > > /* Do the secure computing after ptrace; failures should be fast. */ > if (secure_computing() == -1) > return NO_SYSCALL; > > + /* > + * Ensure tracer changes to x0 during seccomp ptrace exit > + * processing (SECCOMP_RET_TRACE) are visible to tracepoints and > + * audit. > + */ > + update_syscall_orig_x0_after_ptrace(regs); LGTM Reviewed-by: Jinjie Ruan Tested-by: Jinjie Ruan > + > if (test_thread_flag(TIF_SYSCALL_TRACEPOINT)) > trace_sys_enter(regs, regs->syscallno); >