Re: [PATCH v6 05/19] clk: mediatek: Add MT8188 infrastructure clock support

["Garmin Chang (張家銘)" <Garmin.Chang@mediatek.com>]

On Tue, 2023-03-14 at 10:05 +0100, AngeloGioacchino Del Regno wrote:
> Il 09/03/23 14:54, Garmin.Chang ha scritto:
> > Add MT8188 infrastructure clock controller which provides
> > clock gate control for basic IP like pwm, uart, spi and so on.
> > 
> > Signed-off-by: Garmin.Chang <Garmin.Chang@mediatek.com>
> > Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
> > ---
> >   drivers/clk/mediatek/Makefile              |   2 +-
> >   drivers/clk/mediatek/clk-mt8188-infra_ao.c | 196
> > +++++++++++++++++++++
> >   2 files changed, 197 insertions(+), 1 deletion(-)
> >   create mode 100644 drivers/clk/mediatek/clk-mt8188-infra_ao.c
> > 
> > diff --git a/drivers/clk/mediatek/Makefile
> > b/drivers/clk/mediatek/Makefile
> > index f38a5cea2925..172aaef29d5d 100644
> > --- a/drivers/clk/mediatek/Makefile
> > +++ b/drivers/clk/mediatek/Makefile
> > @@ -92,7 +92,7 @@ obj-$(CONFIG_COMMON_CLK_MT8186) += clk-mt8186-
> > mcu.o clk-mt8186-topckgen.o clk-mt
> >   				   clk-mt8186-img.o clk-mt8186-vdec.o
> > clk-mt8186-venc.o \
> >   				   clk-mt8186-cam.o clk-mt8186-mdp.o
> > clk-mt8186-ipe.o
> >   obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-
> > mt8188-topckgen.o \
> > -				   clk-mt8188-peri_ao.o
> > +				   clk-mt8188-peri_ao.o clk-mt8188-
> > infra_ao.o
> >   obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o
> >   obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o
> >   obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o
> > diff --git a/drivers/clk/mediatek/clk-mt8188-infra_ao.c
> > b/drivers/clk/mediatek/clk-mt8188-infra_ao.c
> > new file mode 100644
> > index 000000000000..edc0ba18c67f
> > --- /dev/null
> > +++ b/drivers/clk/mediatek/clk-mt8188-infra_ao.c
> > @@ -0,0 +1,196 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +//
> > +// Copyright (c) 2022 MediaTek Inc.
> > +// Author: Garmin Chang <garmin.chang@mediatek.com>
> 
> Please use C-style comments (apart from the SPDX header) to be
> consistent with
> the other clock drivers.
> 

Thank you for your suggestions.

Ok, I would modify this and below in v7.
> > +
> > +#include <linux/clk-provider.h>
> > +#include <linux/platform_device.h>
> > +#include <dt-bindings/clock/mediatek,mt8188-clk.h>
> 
> order by name.
> 
Ok.
> > +
> 
> ..snip..
> 
> > +
> > +static const struct mtk_clk_desc infra_ao_desc = {
> > +	.clks = infra_ao_clks,
> > +	.num_clks = ARRAY_SIZE(infra_ao_clks),
> > +};
> > +
> > +static const struct of_device_id of_match_clk_mt8188_infra_ao[] =
> > {
> > +	{ .compatible = "mediatek,mt8188-infracfg-ao", .data =
> > &infra_ao_desc },
> > +	{ /* sentinel */ }
> > +};
> 
> MODULE_DEVICE_TABLE is missing
Ok.
> 
> > +
> > +static struct platform_driver clk_mt8188_infra_ao_drv = {
> > +	.probe = mtk_clk_simple_probe,
> > +	.remove = mtk_clk_simple_remove,
> > +	.driver = {
> > +		.name = "clk-mt8188-infra_ao",
> > +		.of_match_table = of_match_clk_mt8188_infra_ao,
> > +	},
> > +};
> > +builtin_platform_driver(clk_mt8188_infra_ao_drv);
> 
> module_platform_driver()
> 
> MODULE_LICENSE
> OK.
> 
> Regards,
> Angelo