From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1760118AbdEOIWJ (ORCPT ); Mon, 15 May 2017 04:22:09 -0400 Received: from mail-wm0-f47.google.com ([74.125.82.47]:37651 "EHLO mail-wm0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759921AbdEOIRK (ORCPT ); Mon, 15 May 2017 04:17:10 -0400 Subject: Re: [PATCH v2 14/18] arm64: dts: meson-gxbb-p20x: Fix node order To: =?UTF-8?Q?Andreas_F=c3=a4rber?= , linux-amlogic@lists.infradead.org References: <20170513143337.14278-1-afaerber@suse.de> <20170513143337.14278-15-afaerber@suse.de> Cc: Mark Rutland , devicetree@vger.kernel.org, Kevin Hilman , Will Deacon , linux-kernel@vger.kernel.org, Rob Herring , Catalin Marinas , Carlo Caione , linux-arm-kernel@lists.infradead.org From: Neil Armstrong Organization: Baylibre Message-ID: Date: Mon, 15 May 2017 10:17:03 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <20170513143337.14278-15-afaerber@suse.de> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/13/2017 04:33 PM, Andreas Färber wrote: > Sort nodes referenced by label alphabetically. > > Signed-off-by: Andreas Färber > --- > v1 -> v2: > * Rebased (new nodes added) > > arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 62 ++++++++++++------------ > 1 file changed, 31 insertions(+), 31 deletions(-) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi > index 0ec1d19522dd..d904deb1018c 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi > @@ -148,34 +148,36 @@ > }; > }; > > -/* This UART is brought out to the DB9 connector */ > -&uart_AO { > - status = "okay"; > - pinctrl-0 = <&uart_ao_a_pins>; > - pinctrl-names = "default"; > +&cvbs_vdac_port { > + cvbs_vdac_out: endpoint { > + remote-endpoint = <&cvbs_connector_in>; > + }; > }; > > -&ir { > +&hdmi_tx { > status = "okay"; > - pinctrl-0 = <&remote_input_ao_pins>; > + pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; > pinctrl-names = "default"; > }; > > -&usb0_phy { > - status = "okay"; > - phy-supply = <&usb_pwr>; > -}; > - > -&usb1_phy { > - status = "okay"; > +&hdmi_tx_tmds_port { > + hdmi_tx_tmds_out: endpoint { > + remote-endpoint = <&hdmi_connector_in>; > + }; > }; > > -&usb0 { > +&ir { > status = "okay"; > + pinctrl-0 = <&remote_input_ao_pins>; > + pinctrl-names = "default"; > }; > > -&usb1 { > +&pwm_ef { > status = "okay"; > + pinctrl-0 = <&pwm_e_pins>; > + pinctrl-names = "default"; > + clocks = <&clkc CLKID_FCLK_DIV4>; > + clock-names = "clkin0"; > }; > > /* Wireless SDIO Module */ > @@ -242,28 +244,26 @@ > vqmmc-supply = <&vddio_boot>; > }; > > -&pwm_ef { > +/* This UART is brought out to the DB9 connector */ > +&uart_AO { > status = "okay"; > - pinctrl-0 = <&pwm_e_pins>; > + pinctrl-0 = <&uart_ao_a_pins>; > pinctrl-names = "default"; > - clocks = <&clkc CLKID_FCLK_DIV4>; > - clock-names = "clkin0"; > }; > > -&cvbs_vdac_port { > - cvbs_vdac_out: endpoint { > - remote-endpoint = <&cvbs_connector_in>; > - }; > +&usb0_phy { > + status = "okay"; > + phy-supply = <&usb_pwr>; > }; > > -&hdmi_tx { > +&usb1_phy { > status = "okay"; > - pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>; > - pinctrl-names = "default"; > }; > > -&hdmi_tx_tmds_port { > - hdmi_tx_tmds_out: endpoint { > - remote-endpoint = <&hdmi_connector_in>; > - }; > +&usb0 { > + status = "okay"; > +}; > + > +&usb1 { > + status = "okay"; > }; > Hi Andreas, Like a previous attempt, I'm not OK with such rework since it will break bisect and add complexity for new patches handling. The order is not alphabetically ordered, live with it. Neil