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Wed, 06 Aug 2025 02:39:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFUleDTUw5OyRyFEFXLE2Lpb3eq7PVabmsgBfWwCw59gHI5xkfv+3BdVifFFhie4I/XngwJ9w== X-Received: by 2002:a17:90b:1c85:b0:31f:6f8c:6c92 with SMTP id 98e67ed59e1d1-32166c2b18emr2718142a91.11.1754473172908; Wed, 06 Aug 2025 02:39:32 -0700 (PDT) Received: from [10.217.216.26] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-76bcce6f61asm15015166b3a.3.2025.08.06.02.39.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 Aug 2025 02:39:32 -0700 (PDT) Message-ID: Date: Wed, 6 Aug 2025 15:09:27 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: qcom: gcc: Update the SDCC clock to use shared_floor_ops To: Konrad Dybcio , Dmitry Baryshkov Cc: Bjorn Andersson , Michael Turquette , Stephen Boyd , Dmitry Baryshkov , Taniya Das , Ajit Pandey , Imran Shaik , Jagadeesh Kona , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250804-sdcc_rcg2_shared_ops-v1-1-41f989e8cbb1@oss.qualcomm.com> Content-Language: en-US From: Taniya Das In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: TPqRxESoVRqLj7hvj8Gyj_kA905Iao__ X-Proofpoint-ORIG-GUID: TPqRxESoVRqLj7hvj8Gyj_kA905Iao__ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODA2MDAwOSBTYWx0ZWRfXwYkaro7M9zwO Avu+pO4SsVfPblduk9KEN1D1KfWPq/bW3cqP6zmJexrB8x6Fjc1lsCSiT5AYElDd5UREjd8jpbL U7EYEeARQ7gUH/btppr8EfHafpXofzoGGfF3lbj2xYhDwgc+x2AEPOpmRaHOm61Jg2lCmePYPYo 9MN/pQXa8ZWEt4l2iZCXbDIBQusonsBGN1QtRwdo5Cft+kHa1VEA+5zYS3N1WfYE+ybLm6gIczI 2l5xuHqZRD9rD+7hK45TZcCdGl5wmUDiOsS4IW4+Lhf/OECfUH1JrXnZ3s+lCR0EbBDeHRKCgLo GRXPpunKJBrHqfCsjI4/ORnrqk21mjK+jo8QKvNRr5PZM7mu6Px/34QaQ+k8MA304GxffGxacrS OWUiOAKJ X-Authority-Analysis: v=2.4 cv=GrlC+l1C c=1 sm=1 tr=0 ts=689322d6 cx=c_pps a=UNFcQwm+pnOIJct1K4W+Mw==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=_mglsAVLPU-HLNVybtwA:9 a=QEXdDO2ut3YA:10 a=uKXjsCUrEbL0IQVhDsJ9:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-06_02,2025-08-04_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 malwarescore=0 clxscore=1015 suspectscore=0 priorityscore=1501 phishscore=0 adultscore=0 bulkscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508060009 On 8/6/2025 3:00 PM, Konrad Dybcio wrote: > On 8/6/25 11:27 AM, Taniya Das wrote: >> >> >> On 8/5/2025 10:52 AM, Dmitry Baryshkov wrote: >>> On Mon, Aug 04, 2025 at 11:59:21PM +0530, Taniya Das wrote: >>>> gcc_sdcc2_apps_clk_src: rcg didn't update its configuration" during >>>> boot. This happens due to the floor_ops tries to update the rcg >>>> configuration even if the clock is not enabled. >>> >>> This has been working for other platforms (I see Milos, SAR2130P, >>> SM6375, SC8280XP, SM8550, SM8650 using shared ops, all other platforms >>> seem to use non-shared ops). What's the difference? Should we switch all >>> platforms? Is it related to the hypervisor? >>> >> >> If a set rate is called on a clock before clock enable, the > > Is this something we should just fix up the drivers not to do? > I do not think CCF has any such limitation where the clock should be enabled and then a clock rate should be invoked. We should handle it gracefully and that is what we have now when the caching capabilities were added in the code. This has been already in our downstream drivers. We can add the fix to do a check 'clk_hw_is_enabled(hw)' in the normal rcg2_ops/rcg2_floor/ceil_ops as well, then we can use them. AFAIK the eMMC framework has this code and this is not limited to drivers. -- Thanks, Taniya Das