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Mon, 17 Feb 2025 10:16:19 +0000 (GMT) Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51HAGIRl009198 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 17 Feb 2025 10:16:18 GMT Received: from [10.231.216.103] (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 17 Feb 2025 02:16:15 -0800 Message-ID: Date: Mon, 17 Feb 2025 18:15:30 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/3] Use APIs in gdsc genpd to switch gdsc mode for venus v4 core From: Renjiang Han To: Dmitry Baryshkov CC: Bjorn Andersson , Michael Turquette , Stephen Boyd , Stanimir Varbanov , Vikash Garodia , Bryan O'Donoghue , Mauro Carvalho Chehab , , , , , Taniya Das References: <20250115-switch_gdsc_mode-v3-0-9a24d2fd724c@quicinc.com> <00449451-d97f-47fe-b0ab-cddb9d2b0e93@quicinc.com> Content-Language: en-US In-Reply-To: <00449451-d97f-47fe-b0ab-cddb9d2b0e93@quicinc.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: lPtMAZwyvINoLSY2k07M5JjZq5dSjKo5 X-Proofpoint-ORIG-GUID: lPtMAZwyvINoLSY2k07M5JjZq5dSjKo5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-17_05,2025-02-13_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 phishscore=0 impostorscore=0 bulkscore=0 spamscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 mlxscore=0 mlxlogscore=843 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2501170000 definitions=main-2502170090 On 1/17/2025 12:17 PM, Renjiang Han wrote: > > On 1/15/2025 5:59 PM, Dmitry Baryshkov wrote: >>> If only the clock patch or the venus driver patch is merged, the venus >>> driver will not work properly. Although it does not affect other system >>> functions, it is still recommended to wait until both the clock patch >>> and the venus driver patch are reviewed and passed, and then merge them >>> into the same release by their respective maintainers. >> NO! This will not work, as both -media and arm-soc branches will be >> broken. Please read about the git-bisect before making such suggestions. >> >> A proper plan would be: >> - implement a function which allows one to check that hwmode is >>    supported by the genpd driver >> - Change Venus to use hwmode for those platforms if it is enabled >> - Enable HWMODE support in the clock driver. Clearly identify that this >>    patch should be merged together and after Venus changes if all >>    maintainers agree with that >> - Clean up now-dead code. >> >> Doing it in any other way would result in the broken kernels. >  Thanks for your comment. dev_pm_genpd_set_hwmode() has a check function. >  So I think I can do it like this to add compatibility in venus driver: >  - 1. the dev_pm_genpd_set_hwmode() is used to switch the GDSC mode by >  default. >  - 2. If it fails and dev_pm_genpd_set_hwmode() returns -EOPNOTSUPP, it >  means that the clock driver uses the HW_CTRL flag. At this time, the >  GDSC mode is switched by writing the POWER_CONTROL register. > >  In addition, the merged code needs to follow this order. >  - 1. Add compatibility in venus driver. >  - 2. Use the HW_CTRL_TRIGGER flag in clock driver >  - 3. Remove the dead code in venus driver. > As internal discussion, in order to merge the patches in the correct order, we plan to submit two patch series. One patch series uses dev_pm_genpd_set_hwmode() to check if hwmode is supported, and the venus driver is compatible with the two methods of switching GDSC mode. Then the clock driver enables hwmode. The other patch series will clean up the dead code. Do you agree to submit two patch series or one? -- Best Regards, Renjiang