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Sat, 07 Jun 2025 04:57:58 -0700 (PDT) Message-ID: Date: Sat, 7 Jun 2025 14:57:57 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/2] ARM: dts: microchip: sama7d65: Add clock name property To: Ryan.Wanner@microchip.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: From: Claudiu Beznea Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, Ryan, On 23.05.2025 23:24, Ryan.Wanner@microchip.com wrote: > From: Ryan Wanner > > Add clock-output-names to the xtal nodes, so the driver can correctly > register the main and slow xtal. > > This fixes the issue of the SoC clock driver not being able to find > the main xtal and slow xtal correctly causing a bad clock tree. > > Fixes: 261dcfad1b59 ("ARM: dts: microchip: add sama7d65 SoC DT") Can you please prepare a similar fix for sam9x7. It is also affected by this, right? Thank you, Claudiu > Signed-off-by: Ryan Wanner > --- > arch/arm/boot/dts/microchip/sama7d65.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm/boot/dts/microchip/sama7d65.dtsi b/arch/arm/boot/dts/microchip/sama7d65.dtsi > index b6710ccd4c36..7b1dd28a2cfa 100644 > --- a/arch/arm/boot/dts/microchip/sama7d65.dtsi > +++ b/arch/arm/boot/dts/microchip/sama7d65.dtsi > @@ -38,11 +38,13 @@ cpu0: cpu@0 { > clocks { > main_xtal: clock-mainxtal { > compatible = "fixed-clock"; > + clock-output-names = "main_xtal"; > #clock-cells = <0>; > }; > > slow_xtal: clock-slowxtal { > compatible = "fixed-clock"; > + clock-output-names = "slow_xtal"; > #clock-cells = <0>; > }; > };