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From: Suzuki K Poulose <Suzuki.Poulose@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, mike.leach@linaro.org,
	robert.walker@arm.com, mark.rutland@arm.com, will.deacon@arm.com,
	robin.murphy@arm.com, sudeep.holla@arm.com,
	frowand.list@gmail.com, robh@kernel.org, john.horley@arm.com
Subject: Re: [PATCH v2 18/27] coresight: catu: Add support for scatter gather tables
Date: Tue, 8 May 2018 16:56:07 +0100	[thread overview]
Message-ID: <dc197d94-b39c-e8af-97c9-e73e815b21fe@arm.com> (raw)
In-Reply-To: <20180507202517.GC32594@xps15>

On 07/05/18 21:25, Mathieu Poirier wrote:
> On Tue, May 01, 2018 at 10:10:48AM +0100, Suzuki K Poulose wrote:
>> This patch adds the support for setting up a SG table for use
>> by the CATU. We reuse the tmc_sg_table to represent the table/data
>> pages, even though the table format is different.
>>

...

>>
>> diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtracing/coresight/coresight-catu.c
>> index 2cd69a6..4cc2928 100644
>> --- a/drivers/hwtracing/coresight/coresight-catu.c
>> +++ b/drivers/hwtracing/coresight/coresight-catu.c
>> @@ -16,10 +16,419 @@

...

>> +
>> +/*
>> + * Update the valid bit for a given range of indices [start, end)
>> + * in the given table @table.
>> + */
>> +static inline void catu_update_state_range(cate_t *table, int start,
>> +						 int end, int valid)
> 
> Indentation
> 

...

>> +#ifdef CATU_DEBUG
>> +static void catu_dump_table(struct tmc_sg_table *catu_table)
>> +{
>> +	int i;
>> +	cate_t *table;
>> +	unsigned long table_end, buf_size, offset = 0;
>> +
>> +	buf_size = tmc_sg_table_buf_size(catu_table);
>> +	dev_dbg(catu_table->dev,
>> +		"Dump table %p, tdaddr: %llx\n",
>> +		catu_table, catu_table->table_daddr);
>> +
>> +	while (offset < buf_size) {
>> +		table_end = offset + SZ_1M < buf_size ?
>> +			    offset + SZ_1M : buf_size;
>> +		table = catu_get_table(catu_table, offset, NULL);
>> +		for (i = 0; offset < table_end; i++, offset += CATU_PAGE_SIZE)
>> +			dev_dbg(catu_table->dev, "%d: %llx\n", i, table[i]);
>> +		dev_dbg(catu_table->dev, "Prev : %llx, Next: %llx\n",
>> +			table[CATU_LINK_PREV], table[CATU_LINK_NEXT]);
>> +		dev_dbg(catu_table->dev, "== End of sub-table ===");
>> +	}
>> +	dev_dbg(catu_table->dev, "== End of Table ===");
>> +}
>> +
>> +#else
>> +static inline void catu_dump_table(struct tmc_sg_table *catu_table)
>> +{
>> +}
>> +#endif
> 
> I think this approach is better than peppering the code with #ifdefs as it was
> done for ETR.  Please fix that to replicate what you've done here.
> 

OK

>> +
>> +/*
>> + * catu_populate_table : Populate the given CATU table.
>> + * The table is always populated as a circular table.
>> + * i.e, the "prev" link of the "first" table points to the "last"
>> + * table and the "next" link of the "last" table points to the
>> + * "first" table. The buffer should be made linear by calling
>> + * catu_set_table().
>> + */
>> +static void
>> +catu_populate_table(struct tmc_sg_table *catu_table)
>> +{

...

>> +	while (offset < buf_size) {
>> +		/*
>> +		 * The @offset is always 1M aligned here and we have an
>> +		 * empty table @table_ptr to fill. Each table can address
>> +		 * upto 1MB data buffer. The last table may have fewer
>> +		 * entries if the buffer size is not aligned.
>> +		 */
>> +		last_offset = (offset + SZ_1M) < buf_size ?
>> +			      (offset + SZ_1M) : buf_size;
>> +		for (i = 0; offset < last_offset; i++) {
>> +
>> +			data_daddr = catu_table->data_pages.daddrs[dpidx] +
>> +				     s_dpidx * CATU_PAGE_SIZE;
>> +#ifdef CATU_DEBUG
>> +			dev_dbg(catu_table->dev,
>> +				"[table %5d:%03d] 0x%llx\n",
>> +				(offset >> 20), i, data_daddr);
>> +#endif
> 
> I'm not a fan of adding #ifdefs in the code like this.  I think it is better to
> have a wrapper (that resolves to nothing if CATU_DEBUG is not defined) and
> handle the output in there.
> 


>> +
>> +	catu_populate_table(catu_table);
>> +	/* Make the buf linear from offset 0 */
>> +	(void)catu_set_table(catu_table, 0, size);
>> +
>> +	dev_dbg(catu_dev,
>> +		"Setup table %p, size %ldKB, %d table pages\n",
>> +		catu_table, (unsigned long)size >> 10,  nr_tpages);
> 
> I think this should also be wrapped in a special output debug function.
> 

I could do something like :

#ifdef CATU_DEBUG
#define catu_dbg(fmt, ...)	dev_dbg(fmt, __VA_ARGS__)
#else
#define catu_dbg(fmt, ...)	do { } while (0)
#endif

And use catu_dbg() for the sprinkled prints.

Cheers
Suzuki

  reply	other threads:[~2018-05-08 15:56 UTC|newest]

Thread overview: 67+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-01  9:10 [PATCH v2 00/27] coresight: TMC ETR backend support for perf Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 01/27] coresight: ETM: Add support for ARM Cortex-A73 Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 02/27] coresight: Cleanup device subtype struct Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 03/27] coresight: Add helper device type Suzuki K Poulose
2018-05-03 17:00   ` Mathieu Poirier
2018-05-05  9:56     ` Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 04/27] coresight: Introduce support for Coresight Addrss Translation Unit Suzuki K Poulose
2018-05-03 17:31   ` Mathieu Poirier
2018-05-03 20:25     ` Mathieu Poirier
2018-05-05 10:03       ` Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 05/27] dts: bindings: Document device tree binding for CATU Suzuki K Poulose
2018-05-01 13:10   ` Rob Herring
2018-05-03 17:42     ` Mathieu Poirier
2018-05-08 15:40       ` Suzuki K Poulose
2018-05-11 16:05         ` Rob Herring
2018-05-14 14:42           ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 06/27] coresight: tmc etr: Disallow perf mode temporarily Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 07/27] coresight: tmc: Hide trace buffer handling for file read Suzuki K Poulose
2018-05-03 19:50   ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 08/27] coresight: tmc-etr: Do not clean trace buffer Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 09/27] coresight: Add helper for inserting synchronization packets Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 10/27] dts: bindings: Restrict coresight tmc-etr scatter-gather mode Suzuki K Poulose
2018-05-01 13:13   ` Rob Herring
2018-05-03 20:32     ` Mathieu Poirier
2018-05-04 22:56       ` Rob Herring
2018-05-08 15:48         ` Suzuki K Poulose
2018-05-08 17:34           ` Rob Herring
2018-05-01  9:10 ` [PATCH v2 11/27] dts: juno: Add scatter-gather support for all revisions Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 12/27] coresight: tmc-etr: Allow commandline option to override SG use Suzuki K Poulose
2018-05-03 20:40   ` Mathieu Poirier
2018-05-08 15:49     ` Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 13/27] coresight: Add generic TMC sg table framework Suzuki K Poulose
2018-05-04 17:35   ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 14/27] coresight: Add support for TMC ETR SG unit Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 15/27] coresight: tmc-etr: Make SG table circular Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 16/27] coresight: tmc-etr: Add transparent buffer management Suzuki K Poulose
2018-05-07 17:20   ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 17/27] coresight: etr: Add support for save restore buffers Suzuki K Poulose
2018-05-07 17:48   ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 18/27] coresight: catu: Add support for scatter gather tables Suzuki K Poulose
2018-05-07 20:25   ` Mathieu Poirier
2018-05-08 15:56     ` Suzuki K Poulose [this message]
2018-05-08 16:13       ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 19/27] coresight: catu: Plug in CATU as a backend for ETR buffer Suzuki K Poulose
2018-05-07 22:02   ` Mathieu Poirier
2018-05-08 16:21     ` Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 20/27] coresight: tmc: Add configuration support for trace buffer size Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 21/27] coresight: Convert driver messages to dev_dbg Suzuki K Poulose
2018-05-02  3:55   ` Kim Phillips
2018-05-02  8:25     ` Robert Walker
2018-05-02 13:52     ` Robin Murphy
2018-05-10 13:36       ` Suzuki K Poulose
2018-05-07 22:28   ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 22/27] coresight: tmc-etr: Track if the device is coherent Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 23/27] coresight: tmc-etr: Handle driver mode specific ETR buffers Suzuki K Poulose
2018-05-08 17:18   ` Mathieu Poirier
2018-05-08 21:51     ` Suzuki K Poulose
2018-05-09 17:12       ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 24/27] coresight: tmc-etr: Relax collection of trace from sysfs mode Suzuki K Poulose
2018-05-07 22:54   ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 25/27] coresight: etr_buf: Add helper for padding an area of trace data Suzuki K Poulose
2018-05-08 17:34   ` Mathieu Poirier
2018-05-01  9:10 ` [PATCH v2 26/27] coresight: perf: Remove reset_buffer call back for sinks Suzuki K Poulose
2018-05-08 19:42   ` Mathieu Poirier
2018-05-11 16:35     ` Suzuki K Poulose
2018-05-01  9:10 ` [PATCH v2 27/27] coresight: etm-perf: Add support for ETR backend Suzuki K Poulose
2018-05-08 22:04   ` Mathieu Poirier

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