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Wed, 29 Oct 2025 22:37:27 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHOi3AtcF65oro4e3+BO0KlY5luy6t+0LWSKM1u0T44ogvuEu8VYVcI28WV6vxqGpo9V+1xOg== X-Received: by 2002:a17:903:22cf:b0:278:704:d6d0 with SMTP id d9443c01a7336-294edbf56admr21509355ad.19.1761802647083; Wed, 29 Oct 2025 22:37:27 -0700 (PDT) Received: from [10.218.35.45] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-29498d39048sm171628295ad.66.2025.10.29.22.37.21 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 29 Oct 2025 22:37:26 -0700 (PDT) Message-ID: Date: Thu, 30 Oct 2025 11:07:19 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 9/9] PCI: dwc: support missing PCIe device on resume To: Sebastian Reichel , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , Jingoo Han , Shawn Lin Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com References: <20251029-rockchip-pcie-system-suspend-v4-0-ce2e1b0692d2@collabora.com> <20251029-rockchip-pcie-system-suspend-v4-9-ce2e1b0692d2@collabora.com> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: <20251029-rockchip-pcie-system-suspend-v4-9-ce2e1b0692d2@collabora.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDMwMDA0NCBTYWx0ZWRfXwGYRyS9jWC/J PfzInGskQftLjao/dmMIODOjZwDKLa9LfKOOmjkfWEcBENNyL+cA6v/EU/DCbZdNNB9AT3JuEzV pT5hzGumPYUSK9gjubDuC9Pt+zh5gK5wKhd7R8FlwkTyt9y13NujyKU2GyHmGcbBGfSjOJXTASe xv2FI57dUzgTy1e97NWZyVevfz01XJZisQ0dZ0XaAEw/KO7GZVthNX209tAx+izVXpMPG8+5WYm bvz/JAulde0OQ/tMotMSYCacDHN2vkpmrEaGAY8VIOsvl8tJuTooEYZKiuIPurh+2pY0322LIGU FY/lG3PejR0EUHiHXHWNS70A1z0rcVE7bjFQmrzqGbg2keTS9sY5bMwZRkTfD0yM7EC51c7KRxJ JHq6WvhIEm0Gw5BNXRjpXil+CPwepQ== X-Proofpoint-GUID: Xr-6kKxApWV4epKMPHC9812nsp6Saa5c X-Authority-Analysis: v=2.4 cv=MuRfKmae c=1 sm=1 tr=0 ts=6902f998 cx=c_pps a=Qgeoaf8Lrialg5Z894R3/Q==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=QX4gbG5DAAAA:8 a=G1FknBJvTCrQj4ipN-0A:9 a=QEXdDO2ut3YA:10 a=x9snwWr2DeNwDh03kgHS:22 a=AbAUZ8qAyYyZVLSsDulk:22 X-Proofpoint-ORIG-GUID: Xr-6kKxApWV4epKMPHC9812nsp6Saa5c X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-10-30_01,2025-10-29_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 suspectscore=0 spamscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 phishscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2510300044 On 10/29/2025 11:26 PM, Sebastian Reichel wrote: > When dw_pcie_resume_noirq() is called for a PCIe root complex for a PCIe > slot with no device plugged on Rockchip RK3576, dw_pcie_wait_for_link() > will return -ETIMEDOUT. During probe time this does not happen, since > the platform sets 'use_linkup_irq'. > > This adds the same logic from dw_pcie_host_init() to the PM resume > function to avoid the problem. > > Signed-off-by: Sebastian Reichel > --- > drivers/pci/controller/dwc/pcie-designware-host.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c > index e92513c5bda5..f25f1c136900 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-host.c > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c > @@ -1215,9 +1215,16 @@ int dw_pcie_resume_noirq(struct dw_pcie *pci) > if (ret) > return ret; > > - ret = dw_pcie_wait_for_link(pci); > - if (ret) > - return ret; > + /* > + * Note: Skip the link up delay only when a Link Up IRQ is present. > + * If there is no Link Up IRQ, we should not bypass the delay > + * because that would require users to manually rescan for devices. > + */ In the resume scenario, we should explicitly wait for the link to be up, there is no IRQ support at this resume phase and secondly after controller resume pm framework will start resuming the bridges & endpoints. what happens if the link is not up by the time endpoint is resume is called. And entire save & restore states might also gets messed up. There will be no way to recover from this. - Krishna Chaitanya. > + if (!pci->pp.use_linkup_irq) { > + ret = dw_pcie_wait_for_link(pci); > + if (ret) > + return ret; > + } > > return ret; > } >