From: Daniel Sneddon <daniel.sneddon@linux.intel.com>
To: Dave Hansen <dave.hansen@intel.com>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
Dave Hansen <dave.hansen@linux.intel.com>,
"maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<x86@kernel.org>
Cc: pawan.kumar.gupta@linux.intel.com,
"H. Peter Anvin" <hpa@zytor.com>,
"open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)"
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH] x86/bugs: Add missing NO_SSB flag
Date: Wed, 28 Aug 2024 16:50:11 -0700 [thread overview]
Message-ID: <dc28f36b-87fa-4aac-8578-6468ae311b16@linux.intel.com> (raw)
In-Reply-To: <9e510f2e-4b11-4001-b6c0-7a3766b8abb4@intel.com>
On 8/28/24 16:36, Dave Hansen wrote:
> On 8/28/24 15:40, Daniel Sneddon wrote:
>> The Moorefield and Lightning Mountain Atom processors are
>> missing the NO_SSB flag in the vulnerabilities whitelist.
>> This will cause unaffected parts to incorrectly be reported
>> as vulnerable. Add the missing flag.
>
> It'd be really cool to add two things to these changelogs: First, who
> figured this out and how? Basically, who cares and why? Second, what
> public Intel documentation supports this change?
The first thing I can do no problem. The second..... :(
next prev parent reply other threads:[~2024-08-28 23:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-28 22:40 Daniel Sneddon
2024-08-28 23:36 ` Dave Hansen
2024-08-28 23:50 ` Daniel Sneddon [this message]
2024-08-28 23:54 ` Dave Hansen
2024-08-29 0:01 ` Daniel Sneddon
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