From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934231AbdKGVXv (ORCPT ); Tue, 7 Nov 2017 16:23:51 -0500 Received: from mail-lf0-f49.google.com ([209.85.215.49]:45152 "EHLO mail-lf0-f49.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934158AbdKGVXt (ORCPT ); Tue, 7 Nov 2017 16:23:49 -0500 X-Google-Smtp-Source: AGs4zMb8rjXGzThMbrVX0LEDJbcwtZwrazARFPM1lK24HfID+qfVExU+Ny6iowqwdjkg1M5kSMGc5Q== Subject: Re: [PATCH 04/10] gpu: host1x: Lock classes during job submission To: Mikko Perttunen , Mikko Perttunen , thierry.reding@gmail.com, jonathanh@nvidia.com Cc: dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org References: <20171105110118.15142-1-mperttunen@nvidia.com> <20171105110118.15142-5-mperttunen@nvidia.com> <97ce4873-fdc1-5197-17bc-74505beadfc4@gmail.com> From: Dmitry Osipenko Message-ID: Date: Wed, 8 Nov 2017 00:23:45 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 07.11.2017 15:28, Mikko Perttunen wrote: > On 05.11.2017 18:46, Dmitry Osipenko wrote: >> On 05.11.2017 14:01, Mikko Perttunen wrote: >>> ... >>> >>> +static int mlock_id_for_class(unsigned int class) >>> +{ >>> +#if HOST1X_HW >= 6 >>> +    switch (class) >>> +    { >>> +    case HOST1X_CLASS_HOST1X: >>> +        return 0; >>> +    case HOST1X_CLASS_VIC: >>> +        return 17; >> >> What is the meaning of returned ID values that you have defined here? Why VIC >> should have different ID on T186? > > On T186, MLOCKs are not "generic" - the HW knows that each MLOCK corresponds to > a specific class. Therefore we must map that correctly. > Okay. >> >>> +    default: >>> +        return -EINVAL; >>> +    } >>> +#else >>> +    switch (class) >>> +    { >>> +    case HOST1X_CLASS_HOST1X: >>> +        return 0; >>> +    case HOST1X_CLASS_GR2D: >>> +        return 1; >>> +    case HOST1X_CLASS_GR2D_SB: >>> +        return 2; >> >> Note that we are allowing to switch 2d classes in the same jobs context and >> currently jobs class is somewhat hardcoded to GR2D. >> >> Even though that GR2D and GR2D_SB use different register banks, is it okay to >> trigger execution of different classes simultaneously? Would syncpoint >> differentiate classes on OP_DONE event? > > Good point, we might need to use the same lock for these two. > >> >> I suppose that MLOCK (the module lock) implies the whole module locking, >> wouldn't it make sense to just use the module ID's defined in the TRM? > > Can you point out where these are defined? See INDMODID / REGF_MODULEID fields of HOST1X_CHANNEL_INDOFF2_0 / HOST1X_SYNC_REGF_ADDR_0 registers, bit numbers of HOST1X_SYNC_INTSTATUS_0 / HOST1X_SYNC_INTC0MASK_0 / HOST1X_SYNC_MOD_TEARDOWN_0.