From: Mark Brown <broonie@kernel.org>
To: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, git@amd.com,
amitrkcian2002@gmail.com
Subject: Re: [PATCH v2] spi: dt-bindings: cdns,qspi-nor: Update minItems/maxItems of resets for Cadence OSPI controller
Date: Thu, 22 May 2025 12:09:19 +0100 [thread overview]
Message-ID: <dc42e07e-0b0a-4fb8-a3a5-8d7a1736a031@sirena.org.uk> (raw)
In-Reply-To: <20250522104745.327675-1-amit.kumar-mahapatra@amd.com>
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On Thu, May 22, 2025 at 04:17:45PM +0530, Amit Kumar Mahapatra wrote:
> The Cadence Octal SPI (OSPI) controller on AMD Versal SoCs requires only
> one reset entry. To reflect this, the maxItems for "resets" and
> "reset-names" has been set to 1 for AMD Versal SoCs, and the minItems for
> these properties has also been updated to 1.
Acked-by: Mark Brown <broonie@kernel.org>
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next prev parent reply other threads:[~2025-05-22 11:09 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-22 10:47 Amit Kumar Mahapatra
2025-05-22 11:09 ` Mark Brown [this message]
2025-05-22 15:52 ` Conor Dooley
2025-05-26 7:07 ` Mahapatra, Amit Kumar
2025-05-26 12:56 ` Krzysztof Kozlowski
2025-05-27 6:05 ` Mahapatra, Amit Kumar
2025-05-27 6:22 ` Krzysztof Kozlowski
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