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From: Michal Simek <michal.simek@amd.com>
To: Pufan Jin <2254650260@qq.com>, Conor Dooley <conor+dt@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Rob Herring <robh@kernel.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, andrew@lunn.ch
Subject: Re: [PATCH v2 0/3] arm64: zynqmp: Add support for ALINX EdgeBoard FZ3A
Date: Mon, 12 Oct 2026 14:40:57 +0200	[thread overview]
Message-ID: <dc6ed720-3b08-4e0c-8516-bd23546c1fc4@amd.com> (raw)
In-Reply-To: <tencent_71C80AF592B6FB36817B3040A6EE18B3A007@qq.com>



On 10/5/26 19:30, Pufan Jin wrote:
> The ALINX EdgeBoard FZ3A is a single board computer from ALINX based on
> the Xilinx Zynq UltraScale+ XCZU3EG SoC.
> 
> This series adds the ALINX vendor prefix, documents the board compatible,
> and adds a device tree for the board's PS peripherals:
> 
>    - UART1 debug console
>    - eMMC (HS200) and microSD card
>    - GEM3 Ethernet with Micrel KSZ9031 PHY on the MDIO bus
>    - I2C0 and I2C1
>    - QSPI NOR flash
>    - PCIe
>    - USB 3.0 host
>    - DisplayPort output
> 
> The Paddle-Mobile FPGA accelerator is not included. Its PL description
> depends on vendor-specific IP and an out-of-tree driver.
> 
> Tested on ALINX FZ3A hardware with Linux 7.3.0-rc5: the board boots from
> SD card into userspace over the serial console, gem3 negotiates
> 1000Mbps/Full duplex with phy-mode = "rgmii-id", and the eMMC runs in
> HS200 mode.
> 
> The base DTB passes CHECK_DTBS=y, and the Xilinx SoC binding passes
> dt_binding_check.
> 
> Changes since v1:
>    - Use the correct vendor prefix 'alinx' instead of 'ebdee', and rename
>      the board and DTS file accordingly (Krzysztof Kozlowski)
>    - Describe the board as a single board computer with the SoC, DDR4 and
>      eMMC on one PCB, not a carrier board with a MYIR SoM (Andrew Lunn)
>    - Add the MDIO bus and describe the KSZ9031 PHY with phy-handle
>      (Andrew Lunn)
>    - Enable eMMC HS200 on sdhci0: drop no-1-8-v, add pinctrl and
>      mmc-hs200-1_8v
>    - Drop power-source and bias-high-impedance from pinctrl_gem3_default,
>      which only produce spurious warnings on the board's pre-2023.1 PM
>      firmware
> 
> Pufan Jin (3):
>    dt-bindings: vendor-prefixes: Add ALINX vendor prefix
>    dt-bindings: soc: xilinx: Add ALINX EdgeBoard FZ3A
>    arm64: zynqmp: Add ALINX EdgeBoard FZ3A
> 
>   .../bindings/soc/xilinx/xilinx.yaml           |   1 +
>   .../devicetree/bindings/vendor-prefixes.yaml  |   2 +
>   arch/arm64/boot/dts/xilinx/Makefile           |   1 +
>   .../xilinx/zynqmp-alinx-edgeboard-fz3a.dts    | 350 ++++++++++++++++++
>   4 files changed, 354 insertions(+)
>   create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-alinx-edgeboard-fz3a.dts
> 
> Range-diff against v1:
> 1:  d6e565186 < -:  --------- dt-bindings: Add EBDEE vendor prefix
> 2:  f546b0d1a < -:  --------- dt-bindings: soc: xilinx: Add EBDEE EdgeBoard FZ3A
> 3:  b114e1da4 < -:  --------- arm64: zynqmp: Add EBDEE EdgeBoard FZ3A development board
> 4:  c33ea63b7 = 1:  c33ea63b7 dt-bindings: vendor-prefixes: Add ALINX vendor prefix
> 5:  888548b4e = 2:  888548b4e dt-bindings: soc: xilinx: Add ALINX EdgeBoard FZ3A
> 6:  cd96303fb = 3:  cd96303fb arm64: zynqmp: Add ALINX EdgeBoard FZ3A
> 
> base-commit: 72d3fcf802c45d00b300f25b848a93c3a2bd7c7e

I am ignoring this patch because I got 2 cover letters with no patches. Send 
them as one thread and don't create mess.

Thanks,
Michal


  reply	other threads:[~2026-10-12 12:41 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-05 17:30 Pufan Jin
2026-10-12 12:40 ` Michal Simek [this message]
2026-10-05 17:33 Pufan Jin
2026-10-12 12:41 ` Michal Simek

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