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From: Dmitry Osipenko <digetx@gmail.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH v3 4/4] memory: tegra20-emc: Support matching timings by LPDDR2 configuration
Date: Tue, 5 Oct 2021 18:51:38 +0300	[thread overview]
Message-ID: <dc730748-04a5-f5bd-727c-a8b7d67b2a26@gmail.com> (raw)
In-Reply-To: <636b147b-0a71-8c40-7038-1227918986e5@canonical.com>

04.10.2021 12:09, Krzysztof Kozlowski пишет:
>> +static void emc_read_lpddr_sdram_info(struct tegra_emc *emc,
>> +				      unsigned int emem_dev,
>> +				      bool print_out)
>> +{
>> +	/* these registers are standard for all LPDDR JEDEC memory chips */
>> +	emc_read_lpddr_mode_register(emc, emem_dev, 5, &emc->manufacturer_id);
>> +	emc_read_lpddr_mode_register(emc, emem_dev, 6, &emc->revision_id1);
>> +	emc_read_lpddr_mode_register(emc, emem_dev, 7, &emc->revision_id2);
>> +	emc_read_lpddr_mode_register(emc, emem_dev, 8, &emc->basic_conf4.value);
> You ignore the return codes but you should not try to load timings in
> such case. The DT could (by mistake or on purpose) have values '0' for
> the fields you compare.
> 

Good suggestion. I'll add a flag that will prevent loading timings if
there was MRR error, thanks.

      parent reply	other threads:[~2021-10-05 15:51 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-03  1:32 [PATCH v3 0/4] tegra20-emc: Identify memory chip by LPDDR configuration Dmitry Osipenko
2021-10-03  1:32 ` [PATCH v3 1/4] dt-bindings: memory: Add LPDDR2 binding Dmitry Osipenko
2021-10-04  7:42   ` Krzysztof Kozlowski
2021-10-04 16:53     ` Dmitry Osipenko
2021-10-03  1:32 ` [PATCH v3 2/4] dt-bindings: memory: tegra20: emc: Document new LPDDR2 sub-node Dmitry Osipenko
2021-10-04  8:37   ` Krzysztof Kozlowski
2021-10-04 16:56     ` Dmitry Osipenko
2021-10-03  1:32 ` [PATCH v3 3/4] memory: Add LPDDR2 configuration helpers Dmitry Osipenko
2021-10-04  8:53   ` Krzysztof Kozlowski
2021-10-03  1:32 ` [PATCH v3 4/4] memory: tegra20-emc: Support matching timings by LPDDR2 configuration Dmitry Osipenko
2021-10-04  9:09   ` Krzysztof Kozlowski
2021-10-04 17:05     ` Dmitry Osipenko
2021-10-05 15:51     ` Dmitry Osipenko [this message]

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