From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754239AbcGECI2 (ORCPT ); Mon, 4 Jul 2016 22:08:28 -0400 Received: from lucky1.263xmail.com ([211.157.147.133]:60421 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754195AbcGECIX (ORCPT ); Mon, 4 Jul 2016 22:08:23 -0400 X-263anti-spam: KSV:0; X-MAIL-GRAY: 1 X-MAIL-DELIVERY: 0 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: shawn.lin@rock-chips.com X-FST-TO: briannorris@chromium.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: shawn.lin@rock-chips.com X-UNIQUE-TAG: <62cb88bdca18453a098f455438217514> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 Subject: Re: [PATCH v4 2/2] PCI: Rockchip: Add Rockchip PCIe controller support To: Marc Zyngier , Bjorn Helgaas References: <1467336290-11282-1-git-send-email-shawn.lin@rock-chips.com> <1467336290-11282-2-git-send-email-shawn.lin@rock-chips.com> <577646D3.7040207@arm.com> Cc: shawn.lin@rock-chips.com, linux-pci@vger.kernel.org, Arnd Bergmann , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Heiko Stuebner , Doug Anderson , Wenrui Li , Rob Herring , devicetree@vger.kernel.org, Brian Norris From: Shawn Lin Message-ID: Date: Tue, 5 Jul 2016 10:08:08 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.3; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1 MIME-Version: 1.0 In-Reply-To: <577646D3.7040207@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 在 2016/7/1 18:32, Marc Zyngier 写道: > On 01/07/16 02:24, Shawn Lin wrote: >> This patch adds Rockchip PCIe controller support found >> on RK3399 Soc platform. >> >> Signed-off-by: Shawn Lin >> >> --- > > [...] > >> +static void rockchip_pcie_legacy_int_handler(struct irq_desc *desc) >> +{ >> + struct irq_chip *chip = irq_desc_get_chip(desc); >> + struct rockchip_pcie_port *port; >> + u32 reg; >> + >> + chained_irq_enter(chip, desc); >> + port = irq_desc_get_handler_data(desc); >> + >> + reg = pcie_read(port, PCIE_CLIENT_INT_STATUS); >> + reg = (reg & ROCKCHIP_PCIE_RPIFR1_INTR_MASK) >> >> + ROCKCHIP_PCIE_RPIFR1_INTR_SHIFT; >> + if (reg) >> + generic_handle_irq(irq_find_mapping(port->irq_domain, >> + ffs(reg))); > > Can't you get multiple pending interrupts at the same time? Here, you > seem to only process one interrupt at a time, which is going to be > pretty inefficient. > Yup, will fix it, thanks. > How about something like: > > while (reg) { > int hwirq = ffs(reg); > int irq; > > reg &= ~BIT(hwirq); > irq = irq_find_mapping(port->irq_domain, hwirq); > if (irq) > generic_handle_irq(irq); > } > >> + chained_irq_exit(chip, desc); >> +} >> + > > Thanks, > > M. > -- Best Regards Shawn Lin