From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-wr1-f53.google.com (mail-wr1-f53.google.com [209.85.221.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B43A29B8EF for ; Mon, 19 Jan 2026 15:16:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.53 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768835767; cv=none; b=B6Z3d/npMBLrHgzqmZ+c4H+beJJtqtzoGjkh/Ds2rNlsm2xSC7e4qwhf7uNjADOY9ar8+ytdrRKL+SGtqMcYqVtcBDn84RqdmzbGNqBkSAS3xhkbRt+GzEGf7J/mqJHyjm5CLU5f0EDzGSnm24RsHI8ICQ8wSb6WbGsbPHoyZt4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1768835767; c=relaxed/simple; bh=RFP5ziETacBHU4nwtUFpWlsU+zU2K5pk97QONqpaA54=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=T3pkEEG21gfkf3Rm+3OjgrQpu2ITzFEzPR99a9GmCgFjWXHgp3PitmdIqPSbhIw0SEmW2/KIhhrkUwZuwUODQGOl3dQB7VzoWyxJaRJ2IX4YKNQOAbGOsvdzEErctUVb3WjX7/C9CFeR4Rtu8zQWAql3bhTHk0CNj+qjD2c6qKI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=D/TTpzDH; arc=none smtp.client-ip=209.85.221.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="D/TTpzDH" Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-42fbc305882so2473100f8f.0 for ; Mon, 19 Jan 2026 07:16:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1768835764; x=1769440564; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=zFT4jUUaZz57bS1dfTSRz5ITsUWUla9JgvhGvj2LyF4=; b=D/TTpzDH7Z9DSBz2Hyo2DICzAx9Ch6qyWqOlFX8az8bcB0W1ZJVolnYDjOA878VN0R uTP++hM2l8oNwRAGgKl39LC3RVTE5C3lszO4h/QGGd0pQSx2UhZ4hi0UG33JOFXQA6A7 N3EKARxFZ9Ux/wfaD08zw2W/Y82pu1HYRCXfYZeKa8yNabkLkVGBW/XQxOi5dz4jx/Z4 r7JYoS4KP2KSGrNj0ldH+mrrSIb4WQPtg5jHCjueKO3PyEDNKWGBktNvKuiLj8c3t3WI WBfxqsWj5TI3zgLavdpA83cKkBq7Vq1Z3LtYyIghpHDULt0Zov/DKGYyX1YgREfv8ZcB MU4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1768835764; x=1769440564; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=zFT4jUUaZz57bS1dfTSRz5ITsUWUla9JgvhGvj2LyF4=; b=hqRtY2Q5DLGcL5NzR3ZWzuPQHeMGhzv0zDu49TNY+AH9ywd2PcHVKN6tQjZ4uUrHhl 2L3nQIJMiE4H8jZmW9y9BpfWRtE202KZETooSHKneaCeOCMN2kcwHB8o9d1nRdQb6Atd N2+wqt3yzENfDfbUQLGDuxWT94sWAl14aK8g8/8Rkgv8ePWxITE/cBHcd5/Keda1B5LQ Em28udXFV/OTFQLHQ5BDdYUwln+YYv5D2g2fCeMbbbL4OsMCbMneZQk/OltHDtz6tvcX oHpZewVECGs02BVHX981E/9RVn65hF2fhrBriytgO7PX5uxxodA1+0FQ2owF6HMR5OCD tgrA== X-Forwarded-Encrypted: i=1; AJvYcCV0kU9+c2Bgy9pTPvmreLCQi3WUETJkJrYmjX6hiAn59snT/UeAL8xNm6laAzahLONqzzZUv3CVDKwTb8E=@vger.kernel.org X-Gm-Message-State: AOJu0YwWbz7f07dPExYqVgF/j2ZWdhE0MZcR2Jn3XXBjqmlyi/L5wvdu cifJ66OfAfOWAk3A8uu3Xf6AdoC6jV8Gs+8cRcbwC7nKhjjIMVFSvHmgPE6zYjINSTU= X-Gm-Gg: AZuq6aJn4nDoPH2r4wGYUR6AFGGW4nr6zD8u0G8mm63FB2J3PZYC5qyP2iONVTdW6OK T9VntaYxlyP05OaoGglR0E9L9SECqU+830rAt2Hr1bc0i4NeUplwSbHo+CoxzN9YUmFCnqe3/qJ IuGlXylJa0ZbYsCnh7gAXNVc55/LxPrZNbsC8tq4eQKxRCz0YTPJ8+I3OAbHHiAjzZ7XQEWat9s XEQdoKqlxfVVnWd7l8xzxFp87oA6FwoMW/VJMv7bdnDlEiAA4ZSn2g7mOnG3oy/yjmVcsmgspVh MLTb21HRxlY+dWVzJBU7GcHtIc+bTn865dV2F5k5mKGTennR3atocmhpJHxluQhApcbT5dwXAJa LptXnkgtkr8nI/tVkrzJLgXcVg0TzopiNijcQrQZHCR6u1XUXmFwQvdb31eHEY4/2jL6AJSQMpd uxTBadXPHJb8gdDPsQ X-Received: by 2002:a5d:64e9:0:b0:432:c37c:d831 with SMTP id ffacd0b85a97d-43569972cd7mr14273632f8f.1.1768835763612; Mon, 19 Jan 2026 07:16:03 -0800 (PST) Received: from [192.168.1.3] ([185.48.77.170]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-43569926648sm24570224f8f.10.2026.01.19.07.16.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 19 Jan 2026 07:16:03 -0800 (PST) Message-ID: Date: Mon, 19 Jan 2026 15:16:01 +0000 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] perf cs-etm: Fix decoding for sparse CPU maps To: Leo Yan Cc: Suzuki K Poulose , Mike Leach , John Garry , Will Deacon , Leo Yan , Peter Zijlstra , Ingo Molnar , Arnaldo Carvalho de Melo , Namhyung Kim , Mark Rutland , Alexander Shishkin , Jiri Olsa , Ian Rogers , Adrian Hunter , Thomas Falcon , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260119-james-perf-coresight-cpu-map-segfault-v2-0-56b956a629ee@linaro.org> <20260119-james-perf-coresight-cpu-map-segfault-v2-1-56b956a629ee@linaro.org> <20260119111509.GD1286628@e132581.arm.com> <3b06ea25-2516-406c-8b78-c359d3fb2aa6@linaro.org> <20260119145337.GB2732125@e132581.arm.com> Content-Language: en-US From: James Clark In-Reply-To: <20260119145337.GB2732125@e132581.arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 19/01/2026 2:53 pm, Leo Yan wrote: > On Mon, Jan 19, 2026 at 11:55:53AM +0000, James Clark wrote: > > [...] > >>>> 0 0 0x200 [0x90]: PERF_RECORD_ID_INDEX nr: 4 >>>> ... id: 771 idx: 0 cpu: 2 tid: -1 >>>> ... id: 772 idx: 1 cpu: 3 tid: -1 >>>> ... id: 773 idx: 0 cpu: 2 tid: -1 >>>> ... id: 774 idx: 1 cpu: 3 tid: -1 >>> >>> Seems to me that this patch works around the issue by using the CPU ID >>> instead, but event->auxtrace.idx is broken. >> >> I don't think it's a workaround, I think it should have been written this >> way in the first place. > > Agree. Sorry for confusion in my rely. > > [...] > >>>> @@ -3086,7 +3086,7 @@ static int cs_etm__queue_aux_fragment(struct perf_session *session, off_t file_o >>>> if (aux_offset >= auxtrace_event->offset && >>>> aux_offset + aux_size <= auxtrace_event->offset + auxtrace_event->size) { >>>> - struct cs_etm_queue *etmq = etm->queues.queue_array[auxtrace_event->idx].priv; >>>> + struct cs_etm_queue *etmq = cs_etm__get_queue(etm, auxtrace_event->cpu); > > During decoding, cs_etm allocates its own AUX queues and needs to > convert the AUX records into a cs_etm-specific format. > > For example: > > event_id=405 idx=0 cpu=0 tid=6673 > event_id=406 idx=1 cpu=1 tid=6673 > event_id=407 idx=2 cpu=3 tid=6673 > event_id=408 idx=3 cpu=4 tid=6673 > event_id=409 idx=4 cpu=5 tid=6673 > ` ` `> CPU ID > `> Event ID `> Generic buffer IDs > > In this case, I deliberately hotplugged off CPU2. As a result, the > buffer IDs are consecutive from 0 to 4, while the CPU ID for CPU2 is > missing. When adding AUX records to the cs_etm queues, we need to > convert from the generic buffer index to the corresponding CPU ID. > > So the above change makes sense to me. > >>>> /* >>>> * If this AUX event was inside this buffer somewhere, create a new auxtrace event >>>> @@ -3095,6 +3095,7 @@ static int cs_etm__queue_aux_fragment(struct perf_session *session, off_t file_o >>>> auxtrace_fragment.auxtrace = *auxtrace_event; >>>> auxtrace_fragment.auxtrace.size = aux_size; >>>> auxtrace_fragment.auxtrace.offset = aux_offset; >>>> + auxtrace_fragment.auxtrace.idx = etmq->queue_nr; > > I am still confused about this. Because above auxtrace will be queued > on cs_etm queues, should we convert from the generic buffer index to the > cs_etm specific one? E.g., > > auxtrace_fragment.auxtrace.idx = auxtrace_event->cpu; > This is basically what the change is already doing. etmq->queue_nr == CPU because cs_etm__setup_queue() is called for every CPU up to max_cpu, not only for ones that were recorded so it has a 1:1 mapping. Using etmq->queue_nr also works in per-thread mode where queue 0 is used, which your suggestion doesn't handle. Otherwise they would be equivalent. To be honest the whole decoder has become hacks on top of hacks. I think we might want to do a full from scratch re-write when we come to do the proper timestamp to MMAP event correlation or the change to not keep resetting the decoder for TRBE wrap mode. > BTW, if my understanding above is valid, it is good to go through the > cs_etm.c file for the "idx <-> CPU ID" conversion. > Do you mean there are other mistakes? I did check the rest and did some testing and didn't see any issues. > Thanks, > Leo > >>>> file_offset += aux_offset - auxtrace_event->offset + auxtrace_event->header.size; >>>> pr_debug3("CS ETM: Queue buffer size: %#"PRI_lx64" offset: %#"PRI_lx64 >>>> >>>> -- >>>> 2.34.1 >>>> >>>> _______________________________________________ >>>> CoreSight mailing list -- coresight@lists.linaro.org >>>> To unsubscribe send an email to coresight-leave@lists.linaro.org >>