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AJvYcCWDWyniqzhbl/GnhCteyDMyJN1s9QtJjaYSKrV1v9xZukBcDeTcRVKQtHOrOMIP4n924LMUUWwXBK2oNjM=@vger.kernel.org X-Gm-Message-State: AOJu0Yzxj0EBRHPDpknnxiyBLoqT2HqFtEoHy8B4FQgYL6L2LgQN5e8v 6UXD0WPkztLfw3ScWwAVNr592bUn6jNaoMgN5lbENjvCu7sEipbOfuaKRyKeNVg= X-Google-Smtp-Source: AGHT+IFwsGFDDcYLdQbQDbnH2ecaEuRN6fTPY6e7kQA/Klr6JIoXz9qoW0zDvWsGSBZmy4CX8Oxabg== X-Received: by 2002:a05:6000:124b:b0:374:c942:a6b4 with SMTP id ffacd0b85a97d-3789268ee7amr8782092f8f.20.1726074940059; Wed, 11 Sep 2024 10:15:40 -0700 (PDT) Received: from localhost ([196.207.164.177]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-3789564a340sm12072218f8f.24.2024.09.11.10.15.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Sep 2024 10:15:39 -0700 (PDT) Date: Wed, 11 Sep 2024 20:15:36 +0300 From: Dan Carpenter To: Vinod Koul Cc: Mukesh Kumar Savaliya , konrad.dybcio@linaro.org, andersson@kernel.org, andi.shyti@kernel.org, linux-arm-msm@vger.kernel.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, linux-i2c@vger.kernel.org, conor+dt@kernel.org, agross@kernel.org, devicetree@vger.kernel.org, linux@treblig.org, Frank.Li@nxp.com, konradybcio@kernel.org Subject: Re: [PATCH v2 0/4] Enable shared SE support over I2C Message-ID: References: <20240906191410.4104243-1-quic_msavaliy@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Wed, Sep 11, 2024 at 10:32:30PM +0530, Vinod Koul wrote: > On 07-09-24, 00:44, Mukesh Kumar Savaliya wrote: > > This Series adds support to share QUP (Qualcomm Unified peripheral) > > based I2C SE (Serial Engine) controller between two subsystems. > > Each subsystem should have its own dedicated GPII (General Purpose - > > Interface Instance) acting as pipe between SE and GSI (Generic SW - > > Interface) DMA HW engine. > > > > Subsystem must acquire Lock over the SE so that it gets uninterrupted > > control till it unlocks the SE. It also makes sure the commonly shared > > TLMM GPIOs are not touched which can impact other subsystem or cause > > any interruption. Generally, GPIOs are being unconfigured during > > suspend time. > > > > GSI DMA engine is capable to perform requested transfer operations > > from any of the I2C client in a seamless way and its transparent to > > the subsystems. Make sure to enable “qcom,shared-se” flag only while > > enabling this feature. I2C client should add in its respective parent > > node. > > > > Example : > > Two clients from different SS can share an I2C SE for same slave device > > OR their owned slave devices. > > Assume I2C Slave EEPROM device connected with I2C controller. > > Each client from ADSP SS and APPS Linux SS can perform i2c transactions. > > This gets serialized by lock TRE + DMA Transfers + Unlock TRE at HW level. > > Where is the rest of the series, I see only this cover letter?? > Something went wrong sending the series. Here is the resend: https://lore.kernel.org/all/20240906191438.4104329-1-quic_msavaliy@quicinc.com/ regards, dan carpenter