From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 74B2735DA4C; Wed, 4 Mar 2026 15:43:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772638998; cv=none; b=ODy24spTL7rosoThg3VGcDCmr6LUXcbW6Mg9RvqKvAjsurQtE9YYCn2TyJq0a1C8hOKDKg42dYRrUOr3bUViSR9C5TOOmCsKKRqtEPlFD0x43Ln8zbKN3b3sPLxuyhDMcbLM1u0pBZYre7eHWo0qccEgV3mvMOANuMTzA1MgKg4= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1772638998; c=relaxed/simple; bh=cHornxVgCUjRkH9b82t/BlVdEKRZylLiJcrFeSQuJNg=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=imsveam3wBGgdx5MZl7Jeo/tsvmQbe2hcmKi+kMG+bYcaPrfFZ0cq1SJwx5/oGUJ2FnxqOxwj5FcQJcHzsZLwZ9dKfayCVOafmY1RlvYCowdmTWAcp0iv6K9lhqNFTZ+GiWcRI7TPL9gTgmSF3F9Y/KVsxzAiqqdfawnv7UEUTw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=OSfgjIxv; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="OSfgjIxv" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2F208C2BCB1; Wed, 4 Mar 2026 15:43:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1772638998; bh=cHornxVgCUjRkH9b82t/BlVdEKRZylLiJcrFeSQuJNg=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=OSfgjIxvD9gA+fPo95umKghL9rKBwcJ/17f+yViRamVh5bDMjtAE/wzcuu7+RKZlf thaIeDW1VPS4W552V0EKK8OBo1ZWwhQwhr9D3pGOI+FYtqvWccJHQ0ufqnIAWqD1aV 3obO/qAdjtc6adzy55aC5I8UiPuql/NjUgrbFmLBi8X4EtbTZZpExRLkrWAyftSnmf hcOE/2kK+p0L/ZYttZcgr7oGvhfX2NlkDifMvYJ3y1qH2+8EbGRD942BgPKzeEYS9h Bs30h8Gcan3JZgnfaUpSDzEgVqnwUQe5sBUozsF5YV20C+IXbQ5GBwIcgZM+BzOdpo QaZ7YEpyTfdcA== Message-ID: Date: Wed, 4 Mar 2026 16:43:13 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC To: Biju Das , "biju.das.au" , Fabrizio Castro , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , "magnus.damm" Cc: "linux-spi@vger.kernel.org" , "linux-renesas-soc@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Prabhakar Mahadev Lad References: <20260304074907.9697-1-biju.das.jz@bp.renesas.com> <20260304074907.9697-2-biju.das.jz@bp.renesas.com> <13d4fd79-784e-407a-9f2b-41cd9a86f232@kernel.org> From: Krzysztof Kozlowski Content-Language: en-US Autocrypt: addr=krzk@kernel.org; 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charset=UTF-8 Content-Transfer-Encoding: 7bit On 04/03/2026 16:18, Biju Das wrote: > Hi Krzysztof Kozlowski, > > Thanks for the review. > >> -----Original Message----- >> From: Krzysztof Kozlowski >> Sent: 04 March 2026 15:04 >> Subject: Re: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC >> >> On 04/03/2026 08:49, Biju wrote: >>> From: Biju Das >>> >>> Document RSPI IP found on the RZ/G3L SoC. The RSPI IP is compatible >>> with the RZ/V2H RSPI IP, but has 2 clocks compared to 3 on RZ/V2H. >>> >>> Signed-off-by: Biju Das >>> --- >>> .../bindings/spi/renesas,rzv2h-rspi.yaml | 26 +++++++++++++++++++ >>> 1 file changed, 26 insertions(+) >>> >>> diff --git >>> a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml >>> b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml >>> index cf8b733b766d..599c06ff08e5 100644 >>> --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml >>> +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml >>> @@ -13,6 +13,7 @@ properties: >>> compatible: >>> oneOf: >>> - enum: >>> + - renesas,r9a08g046-rspi # RZ/G3L >>> - renesas,r9a09g057-rspi # RZ/V2H(P) >>> - renesas,r9a09g077-rspi # RZ/T2H >>> - items: >>> @@ -85,6 +86,31 @@ required: >>> >>> allOf: >>> - $ref: spi-controller.yaml# >>> + - if: >>> + properties: >>> + compatible: >>> + contains: >>> + enum: >>> + - renesas,r9a08g046-rspi >>> + then: >>> + properties: >>> + clocks: >>> + maxItems: 2 >>> + >>> + clock-names: >>> + items: >>> + - const: pclk >>> + - const: tclk >>> + dmas: >>> + maxItems: 2 >>> + >>> + dma-names: >>> + maxItems: 2 >> >> So even after my objections here: >> https://lore.kernel.org/all/9d08ddda-403e-458d-95e4-4e76915df85d@kernel.org/ >> >> this was not fixed and Renesas did not provide actual cross-patch review. > > That patch is not correct. See below. > >> >> This is still probably wrong as pointed out by other patches by Renesas. >> Also, you cannot have flexible names. > > You can have "rx", "tx" in any order and {rx, tx} should be unique dma specifier No. You cannot. I just told you so. Please read writing-bindings for arguments. Look at the code which was here before that incomplete solution was merged. > and it should have at least 1 tx and 1 rx for multiple DMAC. > > For RZ/G3L SoC, only 1 DMA and Nothing prevent us to specify it as { rx, tx} or {rx, tx} > Well, I prevent you. So NAK. Best regards, Krzysztof