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Mon, 24 Feb 2025 09:55:14 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 51O9tDrs007351 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 24 Feb 2025 09:55:13 GMT Received: from [10.152.195.140] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Mon, 24 Feb 2025 01:55:05 -0800 Message-ID: Date: Mon, 24 Feb 2025 15:25:02 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v10 4/6] clk: qcom: Add NSS clock Controller driver for IPQ9574 To: Konrad Dybcio , , , , , , , , , , , , , , , , , , , , , , , , , , , CC: , References: <20250221101426.776377-1-quic_mmanikan@quicinc.com> <20250221101426.776377-5-quic_mmanikan@quicinc.com> <3bfe9a79-517d-4a27-94da-263dd691ec37@oss.qualcomm.com> Content-Language: en-US From: Manikanta Mylavarapu In-Reply-To: <3bfe9a79-517d-4a27-94da-263dd691ec37@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 6cota9YEDLUM6nxbEAvHa_wUWPqZYlJQ X-Proofpoint-GUID: 6cota9YEDLUM6nxbEAvHa_wUWPqZYlJQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-24_04,2025-02-24_01,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 spamscore=0 priorityscore=1501 mlxscore=0 phishscore=0 malwarescore=0 adultscore=0 bulkscore=0 lowpriorityscore=0 impostorscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2502100000 definitions=main-2502240072 On 2/21/2025 5:19 PM, Konrad Dybcio wrote: > On 21.02.2025 11:14 AM, Manikanta Mylavarapu wrote: >> From: Devi Priya >> >> Add Networking Sub System Clock Controller (NSSCC) driver for ipq9574 based >> devices. >> >> Signed-off-by: Devi Priya >> Signed-off-by: Manikanta Mylavarapu >> --- > > [...] > >> +static int nss_cc_ipq9574_probe(struct platform_device *pdev) >> +{ >> + struct regmap *regmap; >> + int ret; >> + >> + ret = devm_pm_runtime_enable(&pdev->dev); >> + if (ret) >> + return ret; >> + >> + ret = devm_pm_clk_create(&pdev->dev); >> + if (ret) >> + return ret; >> + >> + ret = pm_clk_add(&pdev->dev, "nsscc"); >> + if (ret) >> + return dev_err_probe(&pdev->dev, ret, "Fail to add AHB clock\n"); >> + >> + ret = pm_runtime_resume_and_get(&pdev->dev); >> + if (ret) >> + return ret; > > if /\ suceeds > >> + >> + regmap = qcom_cc_map(pdev, &nss_cc_ipq9574_desc); >> + if (IS_ERR(regmap)) >> + return PTR_ERR(regmap); > > you return here without pm_runtime_put, which doesn't decrease the refcount > for core to put down the resource > > if (IS_ERR(regmap)) { > pm_runtime_put(&pdev->dev); > return PTR_ERR(regmap); > } > > instead > Hi Konrad, Thank you for reviewing the patch. I will incorporate your suggested change in the next version. Thanks & Regards, Manikanta.