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Rozycki" Cc: "Thomas Bogendoerfer" , "Jonathan Corbet" , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, "linux-mips@vger.kernel.org" , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Subject: Re: [PATCH v3] MIPS: Implement ieee754 NAN2008 emulation mode Content-Type: text/plain;charset=utf-8 Content-Transfer-Encoding: quoted-printable =E5=9C=A82024=E5=B9=B47=E6=9C=8811=E6=97=A5=E4=B8=83=E6=9C=88 =E4=B8=8B=E5= =8D=886:20=EF=BC=8CMaciej W. Rozycki=E5=86=99=E9=81=93=EF=BC=9A > On Thu, 11 Jul 2024, Jiaxun Yang wrote: > >> >> that's just one case, what about NaN2008 binaries on a legacy MIPS= CPU ? >> > >> > It would be good to check with hard-float QEMU configured for writ= able=20 >> > FCSR.NAN2008 (which is one way original code was verified) that thi= ngs=20 >> > have not regressed. And also what happens if once our emulation ha= s=20 >> > triggered for the unsupported FCSR.NAN2008 mode, an attempt is made= to=20 >> > flip the mode bit via ptrace(2), e.g. under GDB, which I reckon our=20 >> > emulation permits for non-legacy CPUs (and which I think should not= be=20 >> > allowed under the new setting). >>=20 >> PTrace is working as expected (reflects emulated value). > > Yes, sure for reads, but how about *writing* to the bit? Tested flipping nan2008 bits with ieee754=3Demulated with ptrace, it wor= ks on some extent. (flipping the bit to unsupported value immediately triggered emulation). > >> The actual switchable NaN hardware (M5150, P5600) uses a dedicated Co= nfig7 >> bit rather than writable FCSR.NAN2008 to control NaN2008 mode. This i= s undocumented >> and not present on some RTL releases. FCSR.NAN2008 is R/O as per The = MIPS32 Instruction >> Set Manual. This renders the purposed test pointless. > > Yes, for R6 and arguably R5, but not for R3. Architecture specificat= ion=20 > revisions 3.50 through 5.02 define FCSR.NAN2008 (and also FCSR.ABS2008= ) as=20 > either R/O or R/W, at the implementer's discretion, so it is a conform= ing=20 > implementation to have these bits writable and our FPU emulator reflec= ts=20 > it. I won't go into the details here as to why the later revisions of= the=20 > specification have been restricted to the R/O implementation only. > > NB architecture specification revisions 3.50 through 5.01 also have t= he=20 > FCSR.MAC2008 bit defined, removed altogether later on. Thanks for the information, I don't have access to those manuals so I wa= s unaware of that. R/W NAN2008 is prohibited by AVP as well. I briefly tested NaN2008 distro on QEMU modified with r/w NaN2008 bits i= n ieee754=3D strict mode, it seems working fine. Thanks > > Maciej --=20 - Jiaxun