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Mon, 09 Nov 2026 09:43:55 -0800 (PST) Received: from [10.67.48.245] ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id af79cd13be357-9479e784b90sm24886985a.22.2026.11.09.09.43.54 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Nov 2026 09:43:54 -0800 (PST) Message-ID: Date: Mon, 9 Nov 2026 09:43:53 -0800 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] MIPS: SB1250: Validate and update IRQ affinity To: "Maciej W. Rozycki" Cc: linux-mips@vger.kernel.org, Thomas Bogendoerfer , Thomas Gleixner , open list References: <20261103215043.1190947-1-f.fainelli@gmail.com> Content-Language: en-US, fr-FR From: Florian Fainelli In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Maciej, On 11/8/26 22:17, Maciej W. Rozycki wrote: > On Fri, 6 Nov 2026, Maciej W. Rozycki wrote: > >>> sb1250_set_affinity() selects the first online CPU in the requested >>> affinity mask without checking whether such a CPU exists. If the >>> intersection is empty, the resulting CPU index is invalid and must >>> not be passed to cpu_logical_map(). >>> >>> Reject affinity masks containing no online CPU with -EINVAL before >>> accessing the CPU mapping or interrupt mapper registers. >> >> Why do you think this is needed? The only case where an unvalidated mask >> is passed is AFAICT with: >> >> /** >> * irq_force_affinity - Force the irq affinity of a given irq >> * @irq: Interrupt to set affinity >> * @cpumask: cpumask >> * >> * Same as irq_set_affinity, but without checking the mask against >> * online cpus. >> * >> * Solely for low level cpu hotplug code, where we need to make per >> * cpu interrupts affine before the cpu becomes online. >> */ >> >> -- which does not apply here (nor for arch/mips/sibyte/bcm1480/irq.c, >> which uses analogous code and should otherwise be updated accordingly) >> since all the CPUs are onchip the SoC. >> >> Have I missed anything? >> >>> Also update the effective affinity mask to reflect the single logical >>> CPU selected as the interrupt target. >> >> Likewise, why is it needed? This code returns IRQ_SET_MASK_OK (should >> really use the enumeration constant), so the caller will do the copy. > > I can see it went to Linus already. Can we please have it reverted? Apologies for the late response, I was hoping Thomas would allow us to discuss this before applying. The effective-affinity update addresses this warning observed during boot: genirq: irq_chip SB1250-IMR did not update eff. affinity mask of irq 2 IRQ_SET_MASK_OK causes irq_do_set_affinity() to copy the requested mask into irq_common_data.affinity, but it does not populate the separate effective_affinity mask when CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK is enabled. irq_validate_effective_affinity() then finds that mask empty and emits the warning. Since the mapper selects a single CPU, irq_data_update_effective_affinity(d, cpumask_of(i)) records the actual target and addresses that warning. I should have included this in the commit message. You are right about the empty-mask check, I will remove that part, revise the commit message accordingly, and use IRQ_SET_MASK_OK explicitly. BCM1480 should receive the analogous effective-affinity update as well. -- Florian