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([2600:8803:e7e4:500:7bb8:950b:327d:4ba4]) by smtp.gmail.com with ESMTPSA id 006d021491bc7-656c57d63adsm2528160eaf.14.2025.11.07.08.18.41 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Nov 2025 08:18:42 -0800 (PST) Message-ID: Date: Fri, 7 Nov 2025 10:18:41 -0600 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH 2/3] iio: adc: Add support for TI ADS1120 To: Ajith Anandhan , linux-iio@vger.kernel.org Cc: jic23@kernel.org, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20251030163411.236672-1-ajithanandhan0406@gmail.com> <20251030163411.236672-3-ajithanandhan0406@gmail.com> Content-Language: en-US From: David Lechner In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 11/7/25 9:50 AM, Ajith Anandhan wrote: > On 10/31/25 2:43 AM, David Lechner wrote: >> On 10/30/25 11:34 AM, Ajith Anandhan wrote: >>> Add driver for the Texas Instruments ADS1120, a precision 16-bit >>> analog-to-digital converter with an SPI interface. >>> One note about the review process. Any suggestions you agree with, you don't need to reply to specifically. You can trim out those parts in your reply. It saves time for those reading the replies. >>> +struct ads1120_state { >>> +    struct spi_device    *spi; >>> +    struct mutex        lock; >>> +    /* >>> +     * Used to correctly align data. >>> +     * Ensure natural alignment for potential future timestamp support. >>> +     */ >>> +    u8 data[4] __aligned(IIO_DMA_MINALIGN); >>> + >>> +    u8 config[4]; >>> +    int current_channel; >>> +    int gain; >> Since inputs are multiplexed, we can make this gain a per-channel value, no? > > Yes we can, However i want  to keep the initial version simple so would it be > > fine to support per-channel gain configurationin upcoming patches? Absolutely. I really appreciate splitting things up like that as it makes it much easier to review. > >> >> It also sounds like that certain mux input have to have the PGA bypassed >> which means they are limited to only 3 gain values. So these would have >> a different scale_available attribute. > >  Since, I'm gonna enable all the 15 channels. I believe we have to have all > > gains(for differential channels). Correct me if i'm wrong. Yes, that is how I understood the datasheet. Differential channels have all gains. Single-ended channels and diagnostic channels only get the low gains (1, 2, 4). >>> +static int ads1120_write_reg(struct ads1120_state *st, u8 reg, u8 value) >>> +{ >>> +    u8 buf[2]; >>> + >>> +    if (reg > ADS1120_REG_CONFIG3) >>> +        return -EINVAL; >>> + >>> +    buf[0] = ADS1120_CMD_WREG | (reg << 2); >>> +    buf[1] = value; >>> + >>> +    return spi_write(st->spi, buf, 2); >>> +} >> Can we use the regmap framework instead of writing our own? > > I’d like to keep the first version simple so i will add the regmap support in the > > later patch since the single ended has less spi transaction to handle. It would be less churn to implement the regmap right away. Typically we try to avoid churn if we can help it. So this would be an exception to the general suggestion that splitting things up is better.