From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 900B9ECAAD3 for ; Wed, 31 Aug 2022 08:23:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231527AbiHaIXZ (ORCPT ); Wed, 31 Aug 2022 04:23:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50348 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231459AbiHaIXC (ORCPT ); Wed, 31 Aug 2022 04:23:02 -0400 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD3BBC57BB; Wed, 31 Aug 2022 01:22:25 -0700 (PDT) Received: from [192.168.1.100] (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id BD1126601A13; Wed, 31 Aug 2022 09:22:23 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1661934144; bh=icm/XqsM9PV/fPpno6t23gERjpfmgfqXHBCT1ID9Gfc=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=lqdhmblp+a9HG/yl8wGkOvItUJSUOxTeTWLQ3ziPLN/7YSmANMWsXqNifudme6opp FBV4wSuXMocnCZW55OEnyHjHyO4qCzJNgdZTn8FWrSkB+M5Ab0sJYiRPG0srQRGPvr TZh6iCqOZU8YVoaaVR0vu83c/aClGaY4AW0Y8wkwSl1ILKAPSVQW6ygBmkeju3diYj etw4+YyRnDRi2ggOAjTRUlwapUVc3dwbSj7Zc00vLkAj4TtyprYXKkAFwp0Rb3uYAC 4WM7c7kmCWEVtgz5IwdTKmakWhLCR1k/HU9b8hS7PLZ65AEkZ2HFZ2kJutbwXRd4nA +2n5u1DltHBLg== Message-ID: Date: Wed, 31 Aug 2022 10:22:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 Subject: Re: [PATCH v2 4/7] phy: phy-mtk-tphy: disable hardware efuse when set INTR Content-Language: en-US To: Chunfeng Yun , Vinod Koul , Rob Herring Cc: Kishon Vijay Abraham I , Krzysztof Kozlowski , Matthias Brugger , linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Eddie Hung References: <20220829080830.5378-1-chunfeng.yun@mediatek.com> <20220829080830.5378-4-chunfeng.yun@mediatek.com> From: AngeloGioacchino Del Regno In-Reply-To: <20220829080830.5378-4-chunfeng.yun@mediatek.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Il 29/08/22 10:08, Chunfeng Yun ha scritto: > INTR's value is able autoload from hardware efuse by default, when > software tries to update its value, should disable hardware efuse > firstly. > > Signed-off-by: Chunfeng Yun Reviewed-by: AngeloGioacchino Del Regno