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Wed, 22 Jan 2025 14:09:08 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50ME971B023720 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 22 Jan 2025 14:09:07 GMT Received: from [10.216.29.72] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 22 Jan 2025 06:09:03 -0800 Message-ID: Date: Wed, 22 Jan 2025 19:39:00 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: sm8650: setup gpu thermal with higher temperatures To: Konrad Dybcio , Neil Armstrong , Bjorn Andersson , "Konrad Dybcio" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley CC: , , References: <20250110-topic-sm8650-thermal-cpu-idle-v2-0-5787ad79abbb@linaro.org> <20250110-topic-sm8650-thermal-cpu-idle-v2-2-5787ad79abbb@linaro.org> <8fc3b958-5c2f-4c79-8dc0-d1eec9f5e47d@quicinc.com> <56023e4f-d60b-41c3-a3c9-ba768613e9b2@oss.qualcomm.com> From: Akhil P Oommen Content-Language: en-US In-Reply-To: <56023e4f-d60b-41c3-a3c9-ba768613e9b2@oss.qualcomm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: BhV8g_mJlCTaxlYJ8ka8eygpyxY7nYdk X-Proofpoint-ORIG-GUID: BhV8g_mJlCTaxlYJ8ka8eygpyxY7nYdk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-22_06,2025-01-22_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 adultscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 priorityscore=1501 spamscore=0 bulkscore=0 clxscore=1015 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501220105 On 1/17/2025 2:50 AM, Konrad Dybcio wrote: > On 13.01.2025 11:28 AM, Akhil P Oommen wrote: >> On 1/10/2025 4:06 PM, Neil Armstrong wrote: >>> On the SM8650, the dynamic clock and voltage scaling (DCVS) for the GPU >>> is done in an hardware controlled loop by the GPU Management Unit (GMU). >>> >>> Since the GMU does a better job at maintaining the GPUs temperature in an >>> acceptable range by taking in account more parameters like the die >>> characteristics or other internal sensors, it makes no sense to try >>> and reproduce a similar set of constraints with the Linux devfreq thermal >>> core. >> >> Just FYI, this description is incorrect. SM8650's GMU doesn't do any >> sort of thermal management. > > What's this for then? Just reacting to thermal pressure? > > https://git.codelinaro.org/clo/le/platform/vendor/qcom/opensource/graphics-kernel/-/commit/e4387d101d14965c8f2c67e10a6a9499c1a88af4 > I don't think those TSENSE configs matters on SM8650 in production. -Akhil. > Konrad