From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932451AbcK1JcO (ORCPT ); Mon, 28 Nov 2016 04:32:14 -0500 Received: from hqemgate15.nvidia.com ([216.228.121.64]:5977 "EHLO hqemgate15.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932386AbcK1Jb6 (ORCPT ); Mon, 28 Nov 2016 04:31:58 -0500 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Sun, 27 Nov 2016 13:30:17 -0800 Subject: Re: [PATCH V4 2/2] pinctrl: tegra: Add driver to configure voltage and power of io pads To: Laxman Dewangan , Thierry Reding References: <1479976734-30498-1-git-send-email-ldewangan@nvidia.com> <1479976734-30498-3-git-send-email-ldewangan@nvidia.com> <20161125095744.GB11512@ulmo.ba.sec> <2a767269-dc64-3639-2e14-7c6f57230dcf@nvidia.com> <583878A1.7090207@nvidia.com> CC: , , , , , , , , , , From: Jon Hunter Message-ID: Date: Mon, 28 Nov 2016 09:31:49 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <583878A1.7090207@nvidia.com> X-Originating-IP: [10.26.11.88] X-ClientProxiedBy: UKMAIL101.nvidia.com (10.26.138.13) To UKMAIL101.nvidia.com (10.26.138.13) Content-Type: text/plain; charset="windows-1252" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/11/16 17:45, Laxman Dewangan wrote: > > On Friday 25 November 2016 10:56 PM, Jon Hunter wrote: >> On 25/11/16 09:57, Thierry Reding wrote: >>> * PGP Signed by an unknown key >>> >>> On Thu, Nov 24, 2016 at 02:08:54PM +0530, Laxman Dewangan wrote: >> ... >> >>>> diff --git a/drivers/pinctrl/tegra/pinctrl-tegra-io-pad.c >>>> b/drivers/pinctrl/tegra/pinctrl-tegra-io-pad.c >>>> new file mode 100644 >>>> index 0000000..aab02d0 >>>> --- /dev/null >>>> +++ b/drivers/pinctrl/tegra/pinctrl-tegra-io-pad.c >>>> @@ -0,0 +1,530 @@ >>>> +/* >>>> + * pinctrl-tegra-io-pad: IO PAD driver for configuration of IO rail >>>> and deep >>>> + * Power Down mode via pinctrl framework. >>>> + * >>>> + * Copyright (C) 2016 NVIDIA CORPORATION. All rights reserved. >>>> + * >>>> + * Author: Laxman Dewangan >>>> + * >>>> + * This program is free software; you can redistribute it and/or >>>> modify >>>> + * it under the terms of the GNU General Public License version 2 as >>>> + * published by the Free Software Foundation. >>>> + */ >>>> + >>>> +#include >>>> +#include >>>> +#include >>>> +#include >>>> +#include >>>> +#include >>>> +#include >>>> +#include >>>> +#include >>>> +#include >>> Have you considered moving this code into the PMC driver? It seems a >>> little over the top to go through all of the platform device creation >>> and driver registration dance only to call into a public API later on. >> I would prefer moving this under driver/soc/tegra as well (even if it is >> not in the same source file) so we don't need all this public APIs. >> > > Do we really gain anything here by moving driver to drivers/soc/tegra? Only avoid adding these public APIs. By using the pinctrl framework, it would be nice to avoid having to still have public APIs that someone could use directly. > The folder drivers/pinctrl/tegra is dedicated folder for Tegra specific. > We should keep the related driver in given subsystem until this is > really hard to do it. > Even if we organise and move this driver to the driver/soc/tegra, we > will need only 3-4 APIs from the public pmc header to the private header. > I think calling the tegra specific headers/APIs from tegra specific > driver should be fine here. Its OK, but I still prefer not having them at all. Jon -- nvpublic