From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pj1-f41.google.com (mail-pj1-f41.google.com [209.85.216.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 54D21152E0C for ; Mon, 6 Jan 2025 03:49:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.41 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736135401; cv=none; b=ODD9JGk1sW3TeVlO61hjbnS6QAV2lNRyjAgS/YQDn10gogOMkLGeX+ZakjdBaAB+Kf6NJzoxhHVSG3NVN7U3vEybgsNeGtNW7htwsycrPrRc2bEmqIna3IViq3XRvuuorCA0v3KSXMvdC+9SAwgF2Of7TdepuPK20KTq+ZMUJpw= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1736135401; c=relaxed/simple; bh=4dk7AAJmezfFi3ZfUWBsyuZRMbx4LQ4Y67CoiCMSr1k=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=Eayf3cCX6XwDKEYpFPRUhg4mIvx2/5U+f67Uo9gUvw6Vuk0PG/HeDtM1yRBVLzdpz/SsFozOEzZpCCuh5SdFVJ6ExFixSi9nlgcICruvn+mMZ+XNlKRceDnuKQoZ4BEGFxoHUhhbnkyp+kkhBXdXkRi9vjZMkOH4m8i0S2EpaEw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com; spf=pass smtp.mailfrom=bytedance.com; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b=b4N51bm+; arc=none smtp.client-ip=209.85.216.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=bytedance.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bytedance.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bytedance.com header.i=@bytedance.com header.b="b4N51bm+" Received: by mail-pj1-f41.google.com with SMTP id 98e67ed59e1d1-2ef28f07dbaso15659648a91.2 for ; Sun, 05 Jan 2025 19:49:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance.com; s=google; t=1736135398; x=1736740198; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=M/CQCfwbCGmNbncAnjTVlLDBhrllfolDtdV4jFWfmgY=; b=b4N51bm+5ySmYCAAyjdX6ff237xAtmlGkxKFy/7WJODVou3GxVwNmKyE0vdFbXu5FV HimJUI6lCu35w6OvX3FWLN5DLsAVB0/vY2hd0dIv4yPdhz1lJDHT6NEZ1f/nF/YoNxOe ixziRkNULlpHzxcfnM5iplY9rUFj8PInfkzRTSO0eLPbU1Guy+rJJUPMjK1saUkRu8S7 rhK1JIQ7fVjbR2E5BhtDu/Y9LmNp/TXkBqBxPS8j1slVDGC2CEEEm+hJVP8808GGslE5 YUEo3glRfEMH80+stASPYBTHnFRBdLlR4C866/vM9hNYWlj9YlN8KOIUPvT4hTHk2BWi JDwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1736135398; x=1736740198; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=M/CQCfwbCGmNbncAnjTVlLDBhrllfolDtdV4jFWfmgY=; b=qlpjzi29m/2OTqNZhg1tf9CeWdR1Fyc4BWIHsmKNAh24OQfDGPh0dTfhtstl1KQ5I7 bJwFEWfbIdbQ0e+NrPRrjVsIEzJ20Ss8CmAoqsewCZpMM9AMnNx0vTcTvG8LS7SZzOrb gbZ0/E77DvZl9fVvNhVuQz/+gnHWeXzs7etqiee2vLPzPGMpjZSuGH8ikKeeemgSuw83 t9NBTjbW13WCZERA7CG1AgXpkyywdHB88x4Yt/OEi620FaL+hRj85PUDK0AeDOc0guUs Q/2bwsFUpQoEf2C8EZUiKF3YBtS9P9XbvzJiWy2lmOx0DgkRAkaZmkQXF18Dvz9ytDrg C5xw== X-Forwarded-Encrypted: i=1; AJvYcCXHZ+nMj3tF6hipjLvzqn9N5nlo0IQt8Kp0TPdPk2XzH0REZELCuDGJS4/vTAyM5NKjxP8NJG3PEaT5kw8=@vger.kernel.org X-Gm-Message-State: AOJu0YzZAInuW3X58i5ZykP2KnBnghYRWkeXCKxiYvCdFaAuSIUdZhBd rEFQb5sFmRmuYBhlrsLXFoIkUZwfwK8Oh1SSHMxEAEUsJmCTwtItYmGVDBSTqa0= X-Gm-Gg: ASbGncuuu+cf5mjpE8Rc4be1uqoc8vINcKXlDKDZYxjn1djMHxTSV/qYu0JNXr8hcKI rYFPjVG3N7+a50oVgUiJVR/H8c9bEeB5uyC+nP5+9q23Tgc+A4GksVCeD31+kmM7mMLKhO+uUBA hBiHC1P/WSwNBLbGnFu/L//OqbhisugGHdrbXPuf4JQQ7dSt45oCAVraLC/1MrfnoZdCcdQ45V4 ci7HJvPueDD7XXFds2aZEGl80t30RWV3dlG6lFGwFab3/8ONq+OYqdWIvyrJi8WVU9vjYABqfDu IEBb3Q== X-Google-Smtp-Source: AGHT+IHpHJsHb9mpdlPf1WMyDHeUmOQ71xKKXnSQB+gdiLoxCAO6i7uhLAJzOXuDIN6Nxvn4zgv7zA== X-Received: by 2002:a17:90b:53c8:b0:2ee:c2df:5d30 with SMTP id 98e67ed59e1d1-2f452eb11e2mr54849162a91.26.1736135398510; Sun, 05 Jan 2025 19:49:58 -0800 (PST) Received: from [10.84.148.23] ([203.208.167.150]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f447799048sm32821110a91.10.2025.01.05.19.49.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 05 Jan 2025 19:49:58 -0800 (PST) Message-ID: Date: Mon, 6 Jan 2025 11:49:41 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 10/15] riscv: pgtable: move pagetable_dtor() to __tlb_remove_table() Content-Language: en-US To: Kevin Brodsky , peterz@infradead.org, akpm@linux-foundation.org Cc: agordeev@linux.ibm.com, palmer@dabbelt.com, tglx@linutronix.de, david@redhat.com, jannh@google.com, hughd@google.com, yuzhao@google.com, willy@infradead.org, muchun.song@linux.dev, vbabka@kernel.org, lorenzo.stoakes@oracle.com, rientjes@google.com, vishal.moola@gmail.com, arnd@arndb.de, will@kernel.org, aneesh.kumar@kernel.org, npiggin@gmail.com, dave.hansen@linux.intel.com, rppt@kernel.org, ryan.roberts@arm.com, linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, sparclinux@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, linux-arch@vger.kernel.org, linux-csky@vger.kernel.org, linux-hexagon@vger.kernel.org, loongarch@lists.linux.dev, linux-m68k@lists.linux-m68k.org, linux-mips@vger.kernel.org, linux-openrisc@vger.kernel.org, linux-sh@vger.kernel.org, linux-um@lists.infradead.org References: <0e8f0b3835c15e99145e0006ac1020ae45a2b166.1735549103.git.zhengqi.arch@bytedance.com> <1b09335c-f0b6-4ccb-9800-5fb22f7e8083@arm.com> <7e2c26c8-f5df-4833-a93f-3409b00b58fd@arm.com> <31e1a033-00a7-4953-81e7-0caedd0227a9@bytedance.com> From: Qi Zheng In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Kevin, On 2025/1/3 21:27, Kevin Brodsky wrote: > On 03/01/2025 10:35, Qi Zheng wrote: >> On 2025/1/3 17:13, Qi Zheng wrote: >>> On 2025/1/3 16:02, Kevin Brodsky wrote: >>>> On 03/01/2025 04:48, Qi Zheng wrote: >>>>> [...] >>>>> >>>>> In __tlb_batch_free_encoded_pages(), we can indeed detect PageTable() >>>>> and call pagetable_dtor() to dtor the page table pages. >>>>> But __tlb_batch_free_encoded_pages() is also used to free normal pages >>>>> (not page table pages), so I don't want to add overhead there. >>>> >>>> Interesting, can a tlb batch refer to pages than are not PTPs then? >>> >>> Yes, you can see the caller of __tlb_remove_folio_pages() or >>> tlb_remove_page_size(). > > I had a brief look but clearly not a good enough one! I hadn't realised > that "table" in tlb_remove_table() means PTP, while "page" in > tlb_remove_page() can mean any page, and it's making more sense now. > > [...] > >>> >>> For arm, the call to pagetable_dtor() is indeed missed in the >>> non-MMU_GATHER_RCU_TABLE_FREE case. This needs to be fixed. But we >>> can't fix this by adding pagetable_dtor() to tlb_remove_table(), >>> because some architectures call tlb_remove_table() but don't support >>> page table statistics, like sparc. > > When I investigated this for my own series, I found that the only case > where ctor/dtor are not called for page-sized page tables is 32-bit > sparc (see table at the end of [1]). However only 64-bit sparc makes use > of tlb_remove_table() (at PTE level, where ctor/dtor are already called). Thanks for providing this information. > > So really calling pagetable_dtor() from tlb_remove_table() in the > non-MMU_GATHER_TABLE_FREE case seems to be the obvious thing to do. Right. Currently, only powerpc, sparc and x86 will directly call tlb_remove_table(), and all of them are in the MMU_GATHER_TABLE_FREE case. Therefore, I think the modification you mentioned below is feasible. In summary, currently only arm calls tlb_remove_table() in the non-MMU_GATHER_RCU_TABLE_FREE case. So I think we can add this fix directly to patch #8. If I haven't missed anything, I'll send an updated patch #8. > > Once this is done, we should be able to replace all those confusing > calls to tlb_remove_page() on PTPs with tlb_remove_table() and remove > the explicit call to pagetable_dtor(). AIUI this is essentially what > Peter suggested on v3 [2]. Since this patch series is mainly for bug fix, I think that these things can be done in separate patch series later. > > [1] > https://lore.kernel.org/linux-mm/20241219164425.2277022-1-kevin.brodsky@arm.com/ > [2] > https://lore.kernel.org/linux-mm/20250103111457.GC22934@noisy.programming.kicks-ass.net/ > > [...] > >> Or can we just not let tlb_remove_table() fall back to >> tlb_remove_page()? Like the following: >> >> diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h >> index a59205863f431..354ffaa4bd120 100644 >> --- a/include/asm-generic/tlb.h >> +++ b/include/asm-generic/tlb.h >> @@ -195,8 +195,6 @@ >>   *  various ptep_get_and_clear() functions. >>   */ >> >> -#ifdef CONFIG_MMU_GATHER_TABLE_FREE >> - >>  struct mmu_table_batch { >>  #ifdef CONFIG_MMU_GATHER_RCU_TABLE_FREE >>         struct rcu_head         rcu; >> @@ -219,16 +217,6 @@ static inline void __tlb_remove_table(void *table) >> >>  extern void tlb_remove_table(struct mmu_gather *tlb, void *table); >> >> -#else /* !CONFIG_MMU_GATHER_HAVE_TABLE_FREE */ >> - >> -/* >> - * Without MMU_GATHER_TABLE_FREE the architecture is assumed to have >> page based >> - * page directories and we can use the normal page batching to free >> them. >> - */ >> -#define tlb_remove_table(tlb, page) tlb_remove_page((tlb), (page)) > > We still need a different implementation of tlb_remove_table() in this > case. We could define it inline here: > > static inline void tlb_remove_table(struct mmu_gather *tlb, void *table) > { >     struct page *page = table; > >     pagetable_dtor(page_ptdesc(page)); >     tlb_remove_page(page); > } Right. As I said above, will add this to the updated patch #8. Thanks! > > - Kevin