From: Dan Carpenter <dan.carpenter@linaro.org>
To: Lee Jones <lee@kernel.org>
Cc: Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
NXP S32 Linux Team <s32@nxp.com>,
linaro-s32@linaro.org
Subject: [PATCH 2/4] dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs
Date: Mon, 1 Dec 2025 16:08:24 +0300 [thread overview]
Message-ID: <df275a4bbf3fa4d4f0a622cd06d00ebdf847563f.1764592300.git.dan.carpenter@linaro.org> (raw)
In-Reply-To: <cover.1764592300.git.dan.carpenter@linaro.org>
The NXP S32 SoCs have a GPR region which is used by a variety of
drivers. Some examples of the registers in this region are:
* DDR_PMU_IRQ
* GMAC0_PHY_INTF_SEL
* GMAC1_PHY_INTF_SEL
* PFE_EMACS_INTF_SEL
* PFE_COH_EN
* PFE_PWR_CTRL
* PFE_EMACS_GENCTRL1
* PFE_GENCTRL3
Use the syscon interface to access these registers.
Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
---
Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index 55efb83b1495..6e6b92227092 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -102,6 +102,7 @@ select:
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
+ - nxp,s32-gpr
- qcom,apq8064-mmss-sfpb
- qcom,apq8064-sps-sic
- rockchip,px30-qos
@@ -212,6 +213,7 @@ properties:
- mstar,msc313-pmsleep
- nuvoton,ma35d1-sys
- nuvoton,wpcm450-shm
+ - nxp,s32-gpr
- qcom,apq8064-mmss-sfpb
- qcom,apq8064-sps-sic
- rockchip,px30-qos
--
2.51.0
next prev parent reply other threads:[~2025-12-01 13:08 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-01 13:08 [PATCH 0/4] s32g: Use a syscon for GPR Dan Carpenter
2025-12-01 13:08 ` [PATCH 1/4] net: stmmac: s32: use the syscon interface PHY_INTF_SEL_RGMII Dan Carpenter
2025-12-01 16:48 ` Russell King (Oracle)
2025-12-12 6:41 ` Dan Carpenter
2025-12-01 22:29 ` Frank Li
2025-12-02 18:17 ` Dan Carpenter
2025-12-01 13:08 ` Dan Carpenter [this message]
2025-12-01 17:30 ` [PATCH 2/4] dt-bindings: mfd: syscon: Document the GPR syscon for the NXP S32 SoCs Krzysztof Kozlowski
2025-12-01 13:08 ` [PATCH 3/4] dt-bindings: net: nxp,s32-dwmac: Use the GPR syscon Dan Carpenter
2025-12-01 17:33 ` Krzysztof Kozlowski
2025-12-15 10:59 ` Dan Carpenter
2025-12-15 11:03 ` Dan Carpenter
2025-12-01 13:08 ` [PATCH 4/4] dts: s32g: Add GPR syscon region Dan Carpenter
2025-12-01 16:42 ` Frank Li
2025-12-01 16:55 ` Russell King (Oracle)
2025-12-01 14:31 ` [PATCH 0/4] s32g: Use a syscon for GPR Dan Carpenter
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