From: Bryan O'Donoghue <bod@kernel.org>
To: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>,
Loic Poulain <loic.poulain@oss.qualcomm.com>,
Robert Foss <rfoss@kernel.org>,
Andi Shyti <andi.shyti@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>,
Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Abel Vesa <abelvesa@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-media@vger.kernel.org,
Suresh Vankadara <svankada@qti.qualcomm.com>,
Vikram Sharma <vikram.sharma@oss.qualcomm.com>
Subject: Re: [PATCH RFC 05/15] media: qcom: camss: Add Hawi compatible camss driver
Date: Wed, 23 Sep 2026 13:30:45 +0100 [thread overview]
Message-ID: <df6d93bc-b0c1-489f-9ca2-7de4d355ceb6@kernel.org> (raw)
In-Reply-To: <20260923-hawi-maili-camss-v1-5-cbbb42e534ef@oss.qualcomm.com>
On 23/09/2026 12:02, Nihal Kumar Gupta wrote:
> From: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
>
> Add support for Hawi in the camss driver. Hawi reuses the CSIPHY
> resource table from Kaanapali and the TPG resource table from
> X1E80100. The CSID and VFE resource tables are Hawi-specific.
>
> Signed-off-by: Hangxiang Ma <hangxiang.ma@oss.qualcomm.com>
> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com>
Missing Co-Developed-by:
> ---
> drivers/media/platform/qcom/camss/camss.c | 259 ++++++++++++++++++++++++++++++
> drivers/media/platform/qcom/camss/camss.h | 1 +
> 2 files changed, 260 insertions(+)
>
> diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c
> index b862f067936c481408e1e8e1660c8aaf71b065a4..d0cb66ea850e33783912722ef60c97c2148d0ad5 100644
> --- a/drivers/media/platform/qcom/camss/camss.c
> +++ b/drivers/media/platform/qcom/camss/camss.c
> @@ -4476,6 +4476,249 @@ static const struct resources_icc icc_res_sa8775p[] = {
> },
> };
>
> +static const struct camss_subdev_resources vfe_res_hawi[] = {
> + /* VFE0 - TFE Full */
> + {
> + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",
> + "vfe0_fast_ahb", "vfe0", "cpas_vfe0",
> + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo",
> + "cpas_mnoc_hf", "cpas_mnoc_sf" },
> + .clock_rate = { { 0 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 238200000, 397000000, 440000000, 480000000,
> + 630000000, 750000000, 833000000 },
> + { 0 },
> + { 171428571, 240000000, 300000000, 400000000,
> + 480000000, 600000000 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 0 } },
> + .reg = { "vfe0" },
> + .interrupt = { "vfe0" },
> + .vfe = {
> + .line_num = 3,
> + .is_lite = false,
You should only have to set is_lite = true when it is true.
> + .reg_update_after_csid_config = true,
> + .has_pd = true,
> + .pd_name = "ife0",
> + .hw_ops = &vfe_ops_gen4,
> + .formats_rdi = &vfe_formats_rdi_845,
> + .formats_pix = &vfe_formats_pix_845
> + }
> + },
> + /* VFE1 - TFE Full */
> + {
> + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",
> + "vfe1_fast_ahb", "vfe1", "cpas_vfe1",
> + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo",
> + "cpas_mnoc_hf", "cpas_mnoc_sf" },
> + .clock_rate = { { 0 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 238200000, 397000000, 440000000, 480000000,
> + 630000000, 750000000, 833000000 },
> + { 0 },
> + { 171428571, 240000000, 300000000, 400000000,
> + 480000000, 600000000 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 0 } },
> + .reg = { "vfe1" },
> + .interrupt = { "vfe1" },
> + .vfe = {
> + .line_num = 3,
> + .is_lite = false,
> + .reg_update_after_csid_config = true,
> + .has_pd = true,
> + .pd_name = "ife1",
> + .hw_ops = &vfe_ops_gen4,
> + .formats_rdi = &vfe_formats_rdi_845,
> + .formats_pix = &vfe_formats_pix_845
> + }
> + },
> + /* VFE2 - TFE Full */
> + {
> + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",
> + "vfe2_fast_ahb", "vfe2", "cpas_vfe2",
> + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo",
> + "cpas_mnoc_hf", "cpas_mnoc_sf" },
> + .clock_rate = { { 0 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 238200000, 397000000, 440000000, 480000000,
> + 630000000, 750000000, 833000000 },
> + { 0 },
> + { 171428571, 240000000, 300000000, 400000000,
> + 480000000, 600000000 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 0 } },
> + .reg = { "vfe2" },
> + .interrupt = { "vfe2" },
> + .vfe = {
> + .line_num = 3,
> + .is_lite = false,
> + .reg_update_after_csid_config = true,
> + .has_pd = true,
> + .pd_name = "ife2",
> + .hw_ops = &vfe_ops_gen4,
> + .formats_rdi = &vfe_formats_rdi_845,
> + .formats_pix = &vfe_formats_pix_845
> + }
> + },
> + /* VFE3 - IFE Lite */
> + {
> + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",
> + "vfe_lite_ahb", "vfe_lite", "cpas_vfe_lite",
> + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo",
> + "cpas_mnoc_hf", "cpas_mnoc_sf" },
> + .clock_rate = { { 0 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 200000000, 400000000, 480000000 },
> + { 0 },
> + { 171428571, 240000000, 300000000, 400000000,
> + 480000000, 600000000 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 0 } },
> + .reg = { "vfe_lite0" },
> + .interrupt = { "vfe_lite0" },
> + .vfe = {
> + .line_num = 4,
> + .is_lite = true,
> + .reg_update_after_csid_config = true,
> + .hw_ops = &vfe_ops_gen4,
> + .formats_rdi = &vfe_formats_rdi_845,
> + .formats_pix = &vfe_formats_pix_845
> + }
> + },
> + /* VFE4 - IFE Lite */
> + {
> + .clock = { "gcc_axi_hf", "cpas_ahb", "cpas_fast_ahb",
> + "vfe_lite_ahb", "vfe_lite", "cpas_vfe_lite",
> + "camnoc_rt_axi", "camnoc_nrt_axi", "qdss_debug_xo",
> + "cpas_mnoc_hf", "cpas_mnoc_sf" },
> + .clock_rate = { { 0 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 200000000, 400000000, 480000000 },
> + { 0 },
> + { 171428571, 240000000, 300000000, 400000000,
> + 480000000, 600000000 },
> + { 0 },
> + { 0 },
> + { 0 },
> + { 0 } },
> + .reg = { "vfe_lite1" },
> + .interrupt = { "vfe_lite1" },
> + .vfe = {
> + .line_num = 4,
> + .is_lite = true,
> + .reg_update_after_csid_config = true,
> + .hw_ops = &vfe_ops_gen4,
> + .formats_rdi = &vfe_formats_rdi_845,
> + .formats_pix = &vfe_formats_pix_845
> + }
> + },
> +};
> +
> +static const struct camss_subdev_resources csid_res_hawi[] = {
> + /* CSID0 */
> + {
> + .clock = { "csid", "csid_csiphy_rx" },
> + .clock_rate = { { 480000000 },
> + { 480000000 } },
> + .reg = { "csid0" },
> + .interrupt = { "csid0" },
> + .csid = {
> + .is_lite = false,
> + .parent_dev_ops = &vfe_parent_dev_ops,
> + .hw_ops = &csid_ops_gen4,
> + .formats = &csid_formats_gen2
> + }
> + },
> + /* CSID1 */
> + {
> + .clock = { "csid", "csid_csiphy_rx" },
> + .clock_rate = { { 480000000 },
> + { 480000000 } },
> + .reg = { "csid1" },
> + .interrupt = { "csid1" },
> + .csid = {
> + .is_lite = false,
> + .parent_dev_ops = &vfe_parent_dev_ops,
> + .hw_ops = &csid_ops_gen4,
> + .formats = &csid_formats_gen2
> + }
> + },
> + /* CSID2 */
> + {
> + .clock = { "csid", "csid_csiphy_rx" },
> + .clock_rate = { { 480000000 },
> + { 480000000 } },
> + .reg = { "csid2" },
> + .interrupt = { "csid2" },
> + .csid = {
> + .is_lite = false,
> + .parent_dev_ops = &vfe_parent_dev_ops,
> + .hw_ops = &csid_ops_gen4,
> + .formats = &csid_formats_gen2
> + }
> + },
> + /* CSID_LITE0 */
> + {
> + .clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },
> + .clock_rate = { { 480000000 },
> + { 480000000 } },
> + .reg = { "csid_lite0" },
> + .interrupt = { "csid_lite0" },
> + .csid = {
> + .is_lite = true,
> + .parent_dev_ops = &vfe_parent_dev_ops,
> + .hw_ops = &csid_ops_gen4,
> + .formats = &csid_formats_gen2
> + }
> + },
> + /* CSID_LITE1 */
> + {
> + .clock = { "vfe_lite_csid", "vfe_lite_cphy_rx" },
> + .clock_rate = { { 480000000 },
> + { 480000000 } },
> + .reg = { "csid_lite1" },
> + .interrupt = { "csid_lite1" },
> + .csid = {
> + .is_lite = true,
> + .parent_dev_ops = &vfe_parent_dev_ops,
> + .hw_ops = &csid_ops_gen4,
> + .formats = &csid_formats_gen2
> + }
> + }
> +};
> +
> +static const struct resources_icc icc_res_hawi[] = {
> + {
> + .name = "ahb",
> + .icc_bw_tbl.avg = 38400,
> + .icc_bw_tbl.peak = 76800,
> + },
> + {
> + .name = "hf_mnoc",
> + .icc_bw_tbl.avg = 2097152,
> + .icc_bw_tbl.peak = 2097152,
> + },
> +};
> +
> static const struct camss_subdev_resources csiphy_res_x1e80100[] = {
> /* CSIPHY0 */
> {
> @@ -6116,6 +6359,21 @@ static const struct camss_resources sm8650_resources = {
> .vfe_num = ARRAY_SIZE(vfe_res_sm8650),
> };
>
> +static const struct camss_resources hawi_resources = {
> + .version = CAMSS_HAWI,
> + .pd_name = "top",
> + .csiphy_res = csiphy_res_kaanapali,
> + .tpg_res = tpg_res_x1e80100,
> + .csid_res = csid_res_hawi,
> + .vfe_res = vfe_res_hawi,
> + .icc_res = icc_res_hawi,
> + .icc_path_num = ARRAY_SIZE(icc_res_hawi),
> + .csiphy_num = ARRAY_SIZE(csiphy_res_kaanapali),
> + .tpg_num = ARRAY_SIZE(tpg_res_x1e80100),
> + .csid_num = ARRAY_SIZE(csid_res_hawi),
> + .vfe_num = ARRAY_SIZE(vfe_res_hawi),
> +};
> +
> static const struct camss_resources x1e80100_resources = {
> .version = CAMSS_X1E80100,
> .pd_name = "top",
> @@ -6151,6 +6409,7 @@ static const struct of_device_id camss_dt_match[] = {
> { .compatible = "qcom,sm8250-camss", .data = &sm8250_resources },
> { .compatible = "qcom,sm8550-camss", .data = &sm8550_resources },
> { .compatible = "qcom,sm8650-camss", .data = &sm8650_resources },
> + { .compatible = "qcom,hawi-camss", .data = &hawi_resources },
> { .compatible = "qcom,x1e80100-camss", .data = &x1e80100_resources },
> { }
> };
> diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h
> index fadba57c5efaacb39ed3a55b107111528fd3182b..a92aea37c016db8066de392c40405303b74575fc 100644
> --- a/drivers/media/platform/qcom/camss/camss.h
> +++ b/drivers/media/platform/qcom/camss/camss.h
> @@ -96,6 +96,7 @@ enum camss_version {
> CAMSS_8550,
> CAMSS_8650,
> CAMSS_8775P,
> + CAMSS_HAWI,
> CAMSS_KAANAPALI,
> CAMSS_X1E80100,
> };
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2026-09-23 12:30 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-23 11:02 [PATCH RFC 00/15] Add CAMSS and S5KJN5 sensor support for Qualcomm Hawi and Maili Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 01/15] dt-bindings: i2c: qcom,i2c-cci: Add Hawi compatible Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 02/15] dt-bindings: phy: qcom,x1e80100-csi2-phy: Add Hawi and Maili compatibles Nihal Kumar Gupta
2026-09-23 12:11 ` Bryan O'Donoghue
2026-09-23 11:02 ` [PATCH RFC 03/15] dt-bindings: media: Add CAMSS device for Hawi Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 04/15] dt-bindings: media: Add CAMSS device for Maili Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 05/15] media: qcom: camss: Add Hawi compatible camss driver Nihal Kumar Gupta
2026-09-23 12:30 ` Bryan O'Donoghue [this message]
2026-09-24 6:01 ` Nihal Kumar Gupta
2026-09-24 9:34 ` Bryan O'Donoghue
2026-09-23 11:02 ` [PATCH RFC 06/15] media: qcom: camss: vfe: Add support for VFE 1190 Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 07/15] arm64: dts: qcom: hawi: Add CAMSS and CSIPHY nodes for Hawi Nihal Kumar Gupta
2026-09-23 12:40 ` Bryan O'Donoghue
2026-09-23 11:02 ` [PATCH RFC 08/15] arm64: dts: qcom: hawi: Add CCI definitions " Nihal Kumar Gupta
2026-09-23 12:42 ` Bryan O'Donoghue
2026-09-23 11:02 ` [PATCH RFC 09/15] arm64: dts: qcom: hawi: Add camera MCLK pinctrl " Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 10/15] arm64: dts: qcom: hawi-mtp: Enable camera subsystem for Hawi MTP Nihal Kumar Gupta
2026-09-23 12:44 ` Bryan O'Donoghue
2026-09-23 11:02 ` [PATCH RFC 11/15] arm64: dts: qcom: maili: Add support for cambistmclkcc and camcc Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 12/15] arm64: dts: qcom: maili: Add CAMSS and CSIPHY nodes for Maili Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 13/15] arm64: dts: qcom: maili: Add camera MCLK pinctrl " Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 14/15] arm64: dts: qcom: maili-mtp: Enable S5KJN5 camera for Maili MTP Nihal Kumar Gupta
2026-09-23 11:02 ` [PATCH RFC 15/15] arm64: defconfig: Enable S5KJN5 camera sensor for Qualcomm boards Nihal Kumar Gupta
2026-09-23 12:48 ` Bryan O'Donoghue
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