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Wed, 19 Feb 2025 08:58:07 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id BB48C40053; Wed, 19 Feb 2025 08:56:46 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 0D4984026F8; Wed, 19 Feb 2025 08:52:52 +0100 (CET) Received: from [10.48.87.62] (10.48.87.62) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 19 Feb 2025 08:52:51 +0100 Message-ID: Date: Wed, 19 Feb 2025 08:52:50 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 0/8] Add STM32MP25 SPI NOR support To: Rob Herring CC: Mark Brown , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Philipp Zabel , Maxime Coquelin , Greg Kroah-Hartman , Arnd Bergmann , Catalin Marinas , Will Deacon , , , , , , References: <20250218130000.87889-1-patrice.chotard@foss.st.com> <20250218212138.GA1092771-robh@kernel.org> Content-Language: en-US From: Patrice CHOTARD In-Reply-To: <20250218212138.GA1092771-robh@kernel.org> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-02-19_03,2025-02-18_01,2024-11-22_01 On 2/18/25 22:21, Rob Herring wrote: > On Tue, Feb 18, 2025 at 01:59:52PM +0100, patrice.chotard@foss.st.com wrote: >> From: Patrice Chotard >> >> This series adds SPI NOR support for STM32MP25 SoCs from STMicroelectronics. >> >> On STM32MP25 SoCs family, an Octo Memory Manager block manages the muxing, >> the memory area split, the chip select override and the time constraint >> between its 2 Octo SPI children. >> >> Due to these depedencies, this series adds support for: >> - Octo Memory Manager driver. >> - Octo SPI driver. >> - yaml schema for Octo Memory Manager and Octo SPI drivers. >> >> The device tree files adds Octo Memory Manager and its 2 associated Octo >> SPI chidren in stm32mp251.dtsi and adds SPI NOR support in stm32mp257f-ev1 >> board. >> >> Signed-off-by: Patrice Chotard >> >> Changes in v4: >> - Add default value requested by Krzysztof for st,omm-req2ack-ns, >> st,omm-cssel-ovr and st,omm-mux properties in st,stm32mp25-omm.yaml >> - Remove constraint in free form test for st,omm-mux property. >> - Fix drivers/memory/Kconfig by replacing TEST_COMPILE_ by COMPILE_TEST. >> - Fix SPDX-License-Identifier for stm32-omm.c. >> - Fix Kernel test robot by fixing dev_err() format in stm32-omm.c. >> - Add missing pm_runtime_disable() in the error handling path in >> stm32-omm.c. >> - Replace an int by an unsigned int in stm32-omm.c >> - Remove uneeded "," after terminator in stm32-omm.c. >> - Update cover letter description to explain dependecies between >> Octo Memory Manager and its 2 Octo SPI children. >> - Add Reviewed-by Krzysztof Kozlowski for patch 1 and 3. > > No, you didn't. Argh, sorry, i will send a v5 Patrice