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X-CSE-ConnectionGUID: SksGDqzvT/egTCuj3xMQqw== X-CSE-MsgGUID: c9vvA5XtSNSt6f7kNIwwbg== X-IronPort-AV: E=McAfee;i="6700,10204,11198"; a="29270354" X-IronPort-AV: E=Sophos;i="6.10,235,1719903600"; d="scan'208";a="29270354" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2024 21:47:21 -0700 X-CSE-ConnectionGUID: Qc0nLWXrTpW1wpXlQiI0rA== X-CSE-MsgGUID: y+21O7oWTeK2JR19Ufk3BA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,235,1719903600"; d="scan'208";a="70216233" Received: from ahunter6-mobl1.ger.corp.intel.com (HELO [10.0.2.15]) ([10.245.89.141]) by orviesa008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Sep 2024 21:47:17 -0700 Message-ID: Date: Wed, 18 Sep 2024 07:47:12 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V22 00/22] Add support UHS-II for GL9755 and GL9767 To: Victor Shih , ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, benchuanggli@gmail.com, Lucas.Lai@genesyslogic.com.tw, HL.Liu@genesyslogic.com.tw, Greg.tu@genesyslogic.com.tw, dlunev@chromium.org, Victor Shih References: <20240913102836.6144-1-victorshihgli@gmail.com> Content-Language: en-US From: Adrian Hunter Organization: Intel Finland Oy, Registered Address: PL 281, 00181 Helsinki, Business Identity Code: 0357606 - 4, Domiciled in Helsinki In-Reply-To: <20240913102836.6144-1-victorshihgli@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 13/09/24 13:28, Victor Shih wrote: > From: Victor Shih > > Summary > ======= > These patches[1] support UHS-II and fix GL9755 and GL9767 > UHS-II compatibility. > > About UHS-II, roughly deal with the following three parts: > 1) A UHS-II detection and initialization: > - Host setup to support UHS-II (Section 3.13.1 Host Controller Setup > Sequence[2]). > - Detect a UHS-II I/F (Section 3.13.2 Card Interface Detection Sequence > [2]). > - In step(9) of Section 3.13.2 in [2], UHS-II initialization is include > Section 3.13.3 UHS-II Card Initialization and Section 3.13.4 UHS-II > Setting Register Setup Sequence. > > 2) Send Legacy SD command through SD-TRAN > - Encapsulated SD packets are defined in SD-TRAN in order to ensure Legacy > SD compatibility and preserve Legacy SD infrastructures (Section 7.1.1 > Packet Types and Format Overview[3]). > - Host issue a UHS-II CCMD packet or a UHS-II DCMD (Section 3.13.5 UHS-II > CCMD Packet issuing and Section 3.13.6 UHS-II DCMD Packet issuing[2]). > > 3) UHS-II Interrupt > - Except for UHS-II error interrupts, most interrupts share the original > interrupt registers. > > Patch structure > =============== > patch#1-#7: for core > patch#8-#20: for sdhci > patch#21: for GL9755 > patch#22: for GL9767 > > Tests > ===== > Ran 'dd' command to evaluate the performance 3 times: > (SanDisk UHS-II card on GL9755 controller) > Read Write > UHS-II disabled (UHS-I): 85.5MB/s 56.3MB/s > UHS-II enabled : 182MB/s 75.5MB/s > Read Write > UHS-II disabled (UHS-I): 86.7MB/s 52.1MB/s > UHS-II enabled : 179MB/s 77.6MB/s > Read Write > UHS-II disabled (UHS-I): 85.8MB/s 49.1MB/s > UHS-II enabled : 181MB/s 89.8MB/s > (SanDisk UHS-II card on GL9767 controller) > Read Write > UHS-II disabled (UHS-I): 81.9MB/s 49.0MB/s > UHS-II enabled : 186MB/s 87.9MB/s > Read Write > UHS-II disabled (UHS-I): 80.8MB/s 53.5MB/s > UHS-II enabled : 192MB/s 87.3MB/s > Read Write > UHS-II disabled (UHS-I): 81.0MB/s 53.9MB/s > UHS-II enabled : 199MB/s 73.6MB/s > > Test command > ===== > Read: dd if=/dev/mmcxxx of=/dev/null bs=4096k count=2000 iflag=direct > Write:dd if=/dev/zero of=/dev/mmcxxx bs=4096k count=2000 oflag=direct > > Changes in v22 (September. 13, 2024) > * Rebase on latest mmc/next. > * Adjust patch order to avoid defined but nt used warnings: > v21 patch#18 to v22 patch#14. > v21 patch#14 to v22 patch#15. > v21 patch#15 to v22 patch#16. > v21 patch#16 to v22 patch#18. > * Patch#14: Remove unnecessary code to avoid defined but not used warnings. > * Patch#15: Add necessary code to avoid defined but not used warnings. > * Patch#16: Remove unnecessary code to avoid defined but not used warnings. > Modify commit message. > * Patch#17: Remove unnecessary code to avoid defined but not used warnings. > * Patch#18: Add necessary code to avoid defined but not used warnings. For SDHCI: Acked-by: Adrian Hunter