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([2600:8803:e7e4:1d00:70a7:ca49:a250:f1d5]) by smtp.gmail.com with ESMTPSA id 5614622812f47-40b32420a76sm2554421b6e.38.2025.07.02.05.37.56 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 02 Jul 2025 05:37:58 -0700 (PDT) Message-ID: Date: Wed, 2 Jul 2025 07:37:56 -0500 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 10/12] spi: offload trigger: add ADI Util Sigma-Delta SPI driver To: =?UTF-8?Q?Nuno_S=C3=A1?= , Michael Hennerich , Jonathan Cameron , =?UTF-8?Q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mark Brown Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-spi@vger.kernel.org References: <20250701-iio-adc-ad7173-add-spi-offload-support-v3-0-42abb83e3dac@baylibre.com> <20250701-iio-adc-ad7173-add-spi-offload-support-v3-10-42abb83e3dac@baylibre.com> <52c1fe276d16b68b955a00d0417b40902e2aa56e.camel@gmail.com> Content-Language: en-US From: David Lechner In-Reply-To: <52c1fe276d16b68b955a00d0417b40902e2aa56e.camel@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 7/2/25 2:57 AM, Nuno Sá wrote: > On Tue, 2025-07-01 at 16:37 -0500, David Lechner wrote: >> Add a new driver for the ADI Util Sigma-Delta SPI FPGA IP core. >> >> This is used to trigger a SPI offload based on a RDY signal from an ADC >> while masking out other signals on the same line. >> >> Signed-off-by: David Lechner >> --- --- >> +static int adi_util_sigma_delta_probe(struct platform_device *pdev) >> +{ >> + struct device *dev = &pdev->dev; >> + struct spi_offload_trigger_info info = { >> + .fwnode = dev_fwnode(dev), >> + .ops = &adi_util_sigma_delta_ops, >> + }; >> + struct clk *clk; >> + >> + clk = devm_clk_get_enabled(dev, NULL); >> + if (IS_ERR(clk)) >> + return dev_err_probe(dev, PTR_ERR(clk), "Failed to get >> clock\n"); >> + > > Small nit. Did you consider enabling/disabling the clock on the trigger > enable()/disable() callback? I guess the ref clk will be enabled anyways by > someone else but conceptually kind of makes sense to enable the resource only > when needed. > > Not a big deal (at least to me). > > - Nuno Sá > I thought about it, but we don't do that for any other FPGA IP cores so I didn't do it here either. Since they all use the same AXI clock anyway, disabling the clock here probably doesn't have any effect in practice since there will always be other users of the same clock keeping it enabled.