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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a285305085sm3104682e87.59.2026.03.24.04.27.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 24 Mar 2026 04:27:49 -0700 (PDT) Message-ID: Date: Tue, 24 Mar 2026 12:27:47 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] PCI: qcom: Advertise hotplug with no command completion support To: Manivannan Sadhasivam , Krishna Chaitanya Chundru Cc: Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260314-hotplug-v1-1-96ac87d93867@oss.qualcomm.com> <015d00db-9ed5-45a7-83f8-1b10bc2ee457@oss.qualcomm.com> <4649cbd8-7128-4c24-8d8d-c12bfd2a677c@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMzI0MDA5MSBTYWx0ZWRfX200WzORYmK0/ 78dpop50UyoKuZeqUppyBW698r5HZf7ZCiqZuKYHa6EpDlCFa/SoLbJLy6R+J5X+auiGuHhUfrJ E0n8nSjVgHWxLqcQVOEUcuSHAFeLY+PKLEaOxwDo0gD8R82gU/OlZJLjA5uVmjXQHiNkjS5ye6E gFb3TAl4uW8hE8wxRNBfFPOn8s/nD6XOwXzijoYdmv/vHfTcxhkubRLC/7KHrnlmHi+pnYxJOkF vEVqS543qzng0cJZP/tI2GjBkUEw89xxi7UzCVu2pXuMRuKRTxGAsBwqh6T2v6VIsfzO0Mu1O2t +sZZEvXx2pm/rJqzKzt7s3xsTYXz3mEnstJl8N1nSIESWMQF5BLx1se4048n+HWpOL0NalPwc1d oDI/diCba8iHOd31751lQJs4rkPXdVjdj2fwj/zxstUnPclNhLABjHAJIJNeH1p8A9PuutA7hyv JyV7um2CBihGVowyATw== X-Proofpoint-GUID: T0nyKsh272f5lBAa1aMj0WRM-zIu1uUH X-Proofpoint-ORIG-GUID: T0nyKsh272f5lBAa1aMj0WRM-zIu1uUH X-Authority-Analysis: v=2.4 cv=I+pohdgg c=1 sm=1 tr=0 ts=69c27538 cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=EUspDBNiAAAA:8 a=Ca1UC_GKNUODAY3tWcwA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-03-24_02,2026-03-23_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 suspectscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 spamscore=0 priorityscore=1501 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603240091 On 3/21/26 1:01 PM, Manivannan Sadhasivam wrote: > On Fri, Mar 20, 2026 at 07:10:19AM +0530, Krishna Chaitanya Chundru wrote: >> >> >> On 3/19/2026 4:29 PM, Konrad Dybcio wrote: >>> On 3/16/26 1:22 PM, Krishna Chaitanya Chundru wrote: >>>> >>>> On 3/15/2026 3:39 PM, Manivannan Sadhasivam wrote: >>>>> On Sat, Mar 14, 2026 at 07:26:34AM +0530, Krishna Chaitanya Chundru wrote: >>>>>> QCOM PCIe controller advertise hotplug capability in hardware but do not >>>>>> support hotplug command completion. As a result, the PCI core registers >>>>>> the pciehp service and issues hotplug commands that never gets completions, >>>>>> leading to repeated timeout warnings and multi-second delays during boot >>>>>> and suspend/resume. >>>>>> >>>>>> Commit a54db86ddc153 ("PCI: qcom: Do not advertise hotplug capability for >>>>>> IPs v2.7.0 and v1.9.0") avoided these timeouts by clearing the Hot-Plug >>>>>> Capability bit entirely, which also disabled all hotplug functionality. >>>>>> >>>>> Just some background: I added commit a54db86ddc153 to disable hotplug for Qcom >>>>> PCIe Root Ports since we were seeing completion timeouts for hotplug commands >>>>> and also the PRSNT# signal was not exposed on any of our SoCs. After checking >>>>> with some internal folks I learned that hotplug functionality was not exercised >>>>> in Linux. So these facts made me believe that hotplug was not suppored at all. >>>>> >>>>> But it turned out that the Qcom Root Ports support "Data Link Layer State >>>>> Changed Events" such as DL_Up/Down events. >>>>> >>>>>> Instead of disabling hotplug, mark these controllers as not supporting >>>>>> command completion by setting the No Command Completed Support (NCCS) bit >>>>>> in the Slot Capabilities register. This prevents the PCI hotplug driver >>>>>> from waiting for commands completion while still allowing hotplug-related >>>>>> functionality such as Data Link Layer state change events. >>>>>> >>>>>> Signed-off-by: Krishna Chaitanya Chundru >>>>>> --- >>>>>>   drivers/pci/controller/dwc/pcie-qcom.c | 2 +- >>>>>>   1 file changed, 1 insertion(+), 1 deletion(-) >>>>>> >>>>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c >>>>>> index 67a16af69ddc75fca1b123e70715e692a91a9135..a2924610f3625f2456a491473c135840e31bafb9 100644 >>>>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c >>>>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c >>>>>> @@ -358,7 +358,7 @@ static void qcom_pcie_clear_hpc(struct dw_pcie *pci) >>>>>>       dw_pcie_dbi_ro_wr_en(pci); >>>>>>         val = readl(pci->dbi_base + offset + PCI_EXP_SLTCAP); >>>>>> -    val &= ~PCI_EXP_SLTCAP_HPC; >>>>>> +    val |= PCI_EXP_SLTCAP_NCCS; >>>>> Are you sure that this is the only non-supported capability? What about >>>>> Attention, Presence, Power Fault, MRL etc...? >>>> Even though there no signals required for attention, presence etc in the hardware >>>> there is a way to generate these MSI's with these bits set through parf, so technically >>>> so other co-processor in the system can trigger interrupts. >>> Are you saying that the RC itself will not generate them based on what >>> happens on the bus, but they can be triggered artificially? >> Yes there are parf registers through which msi's can be triggered >> artificially. >> > > As Krishna said, it seems there are ways to *inject* these events through > platform specific means (through PARF register space), even if the associated > signals are not exposed to the slot. And we might end up using those events at > some point. > > So it is OK from my opinion to just disable NCCS. But this also warrants a > comment in the code. Alright, in any case, this is required for PCIe-over-TBT hotplug without tapping into the "global" irq Tested-by: Konrad Dybcio # Hamoa CRD, tunneled link and with the comment added: Reviewed-by: Konrad Dybcio Konrad