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Tue, 20 Jan 2026 04:54:41 -0500 (EST) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: AyIhq_EbNuZc Date: Tue, 20 Jan 2026 10:52:53 +0100 From: "Arnd Bergmann" To: "Marc Zyngier" , "Arnd Bergmann" Cc: "Thomas Gleixner" , "Lorenzo Pieralisi" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Message-Id: In-Reply-To: <865x8wd5v9.wl-maz@kernel.org> References: <20260119201603.2713066-1-arnd@kernel.org> <865x8wd5v9.wl-maz@kernel.org> Subject: Re: [PATCH] irqchip: gic-v3-its: avoid truncating memory addresses Content-Type: text/plain Content-Transfer-Encoding: 7bit On Tue, Jan 20, 2026, at 09:51, Marc Zyngier wrote: > On Mon, 19 Jan 2026 20:15:12 +0000, Arnd Bergmann wrote: >> >> Change the itt_addr variable to the correct phys_addr_t type instead, >> along with all other variables in this driver that hold a physical >> address. > > Ah, nice catch. It's amazing that we've managed for so long with such > a glaring bug. I guess most 32bit VMs don't have much memory above the > 4GB limit. Right, the upstream qemu model specifically has no lowmem above the limit, as its RAM starts as 0x40000000 and the most lowmem we support (with CONFIG_VMSPLIT_1G) is 3.75GiB, ending at 0xEFFFFFFF physical. There are some SoCs that start physical RAM higher up, but I suppose these were either never tested with CONFIG_VMSPLIT_1G, or they don't have a GICv3. The patch I'm testing with allows lowmem to be at physically discontinuous addresses, so this can happen on any SoC that has its second DRAM controller mapped to a high address, potentially even with the regular VMSPLIT_3G or VMSPLIT_2G. >> I checked the gicv5 driver for the same problem, and it correctly >> uses u64 variables, > > GICv5 is strictly 64bit, and cannot be plugged on a system that > supports AArch32. Right, makes sense. Arnd