From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-10.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 435E7C433ED for ; Wed, 31 Mar 2021 15:29:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1544560FE4 for ; Wed, 31 Mar 2021 15:29:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235622AbhCaP2r (ORCPT ); Wed, 31 Mar 2021 11:28:47 -0400 Received: from foss.arm.com ([217.140.110.172]:45002 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235512AbhCaP2Q (ORCPT ); Wed, 31 Mar 2021 11:28:16 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4F3CDD6E; Wed, 31 Mar 2021 08:28:15 -0700 (PDT) Received: from [192.168.0.110] (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BB3793F792; Wed, 31 Mar 2021 08:28:13 -0700 (PDT) Subject: Re: [PATCH v5 07/19] arm64: kvm: Enable access to TRBE support for host To: Suzuki K Poulose , Marc Zyngier Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, coresight@lists.linaro.org, mathieu.poirier@linaro.org, mike.leach@linaro.org, leo.yan@linaro.org, anshuman.khandual@arm.com, catalin.marinas@arm.com, Will Deacon , Mark Rutland References: <20210323120647.454211-1-suzuki.poulose@arm.com> <20210323120647.454211-8-suzuki.poulose@arm.com> <87r1jxq7ax.wl-maz@kernel.org> From: Alexandru Elisei Message-ID: Date: Wed, 31 Mar 2021 16:28:46 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Content-Language: en-US Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello, On 3/30/21 12:12 PM, Suzuki K Poulose wrote: > Hi Marc > > On 30/03/2021 11:12, Marc Zyngier wrote: >> Hi Suzuki, >> >> [+ Alex] >> >> On Tue, 23 Mar 2021 12:06:35 +0000, >> Suzuki K Poulose wrote: >>> [..] >> >>>   #define MDCR_EL2_TTRF        (1 << 19) >>>   #define MDCR_EL2_TPMS        (1 << 14) >>>   #define MDCR_EL2_E2PB_MASK    (UL(0x3)) >>> diff --git a/arch/arm64/include/asm/kvm_host.h >>> b/arch/arm64/include/asm/kvm_host.h >>> index 3d10e6527f7d..80d0a1a82a4c 100644 >>> --- a/arch/arm64/include/asm/kvm_host.h >>> +++ b/arch/arm64/include/asm/kvm_host.h >>> @@ -315,6 +315,8 @@ struct kvm_vcpu_arch { >>>           struct kvm_guest_debug_arch regs; >>>           /* Statistical profiling extension */ >>>           u64 pmscr_el1; >>> +        /* Self-hosted trace */ >>> +        u64 trfcr_el1; >>>       } host_debug_state; >>>         /* VGIC state */ >>> diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S >>> index 5eccbd62fec8..05d25e645b46 100644 >>> --- a/arch/arm64/kernel/hyp-stub.S >>> +++ b/arch/arm64/kernel/hyp-stub.S >>> @@ -115,9 +115,10 @@ SYM_CODE_START_LOCAL(mutate_to_vhe) >>>       mrs_s    x0, SYS_VBAR_EL12 >>>       msr    vbar_el1, x0 >>>   -    // Use EL2 translations for SPE and disable access from EL1 >>> +    // Use EL2 translations for SPE & TRBE and disable access from EL1 >>>       mrs    x0, mdcr_el2 >>>       bic    x0, x0, #(MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT) >>> +    bic    x0, x0, #(MDCR_EL2_E2TB_MASK << MDCR_EL2_E2TB_SHIFT) >>>       msr    mdcr_el2, x0 >>>         // Transfer the MM state from EL1 to EL2 >>> diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c >>> index dbc890511631..7b16f42d39f4 100644 >>> --- a/arch/arm64/kvm/debug.c >>> +++ b/arch/arm64/kvm/debug.c >>> @@ -89,7 +89,7 @@ void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu) >>>    *  - Debug ROM Address (MDCR_EL2_TDRA) >>>    *  - OS related registers (MDCR_EL2_TDOSA) >>>    *  - Statistical profiler (MDCR_EL2_TPMS/MDCR_EL2_E2PB) >>> - *  - Self-hosted Trace Filter controls (MDCR_EL2_TTRF) >>> + *  - Self-hosted Trace (MDCR_EL2_TTRF/MDCR_EL2_E2TB) >> >> For the record, this is likely to conflict with [1], although that >> patch still has some issues. > > Thanks for the heads up. I think that patch will also conflict with my fixes > that is queued in kvmarm/fixes. How should I proceed with the patch [1]? For the next iteration, should I rebase it on top of kvmarm/fixes or on top of kvmarm/fixes + this series? [1] https://lore.kernel.org/r/20210323180057.263356-1-alexandru.elisei@arm.com Thanks, Alex