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From: "Arnd Bergmann" <arnd@arndb.de>
To: "Linus Torvalds" <torvalds@linux-foundation.org>,
	"Maciej W. Rozycki" <macro@orcam.me.uk>
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
	"Ivan Kokshaysky" <ink@unseen.parts>,
	"Matt Turner" <mattst88@gmail.com>,
	"John Paul Adrian Glaubitz" <glaubitz@physik.fu-berlin.de>,
	"Magnus Lindholm" <linmag7@gmail.com>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	"Alexander Viro" <viro@zeniv.linux.org.uk>,
	linux-alpha@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] Alpha: Emulate unaligned LDx_L/STx_C for data consistency
Date: Tue, 08 Apr 2025 10:37:49 +0200	[thread overview]
Message-ID: <e1356a60-525b-4405-ad5b-eb6e93de8fef@app.fastmail.com> (raw)
In-Reply-To: <CAHk-=whKa0-myNkpq2aMCQ=o7S+Sqj--TQEM8wfC9b2C04jidA@mail.gmail.com>

On Tue, Apr 8, 2025, at 02:34, Linus Torvalds wrote:
> On Mon, 7 Apr 2025 at 13:46, Maciej W. Rozycki <macro@orcam.me.uk> wrote:
>>
>>  So unless I'm proved otherwise (e.g. that all such code paths are now
>> gone from networking, which may or may not be the case: I saw IPX go but I
>> can see AppleTalk still around; or that no sub-longword accesses are ever
>> used in the relevant networking paths), I'm going to keep kernel emulation
>> in v2, because what just used to be wrapped in an unaligned LDQ/STQ pair,
>> which we trapped on and emulated, will now become an LDQ_L/STQ_C loop.
>>
>>  Do you happen to know what the situation is here?
>
> I think networking ends up using 'get_unaligned()' properly for header
> accesses these days for any of this.
>
> If you don't, some architectures will literally silently give you
> garbage back and not even fault.
>
> Admittedly that's mainly some really broken old 32-bit ARM stuff and
> hopefully it's all dead by now.

Yes, the last one doing this was EBSA110, which we removed in 2020.

> So unless you actually *see* the unaligned faults, I really think you
> shouldn't emulate them.
>
> And I'd like to know where they are if you do see them

FWIW, all the major architectures that have variants without
unaligned load/store (arm32, mips, ppc, riscv) trap and emulate
them for both user and kernel access for normal memory, but
they don't emulate it for atomic ll/sc type instructions.
These instructions also trap and kill the task on the
architectures that can do hardware unaligned access (x86
cmpxchg8b being a notable exception).

     Arnd

  reply	other threads:[~2025-04-08  8:38 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-02-19 12:46 Maciej W. Rozycki
2025-02-19 17:38 ` Magnus Lindholm
2025-02-19 23:40 ` Linus Torvalds
2025-02-20 22:09   ` Maciej W. Rozycki
2025-04-07 20:46     ` Maciej W. Rozycki
2025-04-08  0:34       ` Linus Torvalds
2025-04-08  8:37         ` Arnd Bergmann [this message]
2025-04-09 15:52           ` Eric W. Biederman
2025-04-09 20:59             ` Maciej W. Rozycki
2025-04-10  4:37               ` Eric W. Biederman
2025-02-20 14:25 ` Magnus Lindholm
2025-02-20 16:46 ` Matt Turner
2025-02-20 16:52   ` Matt Turner
2025-02-20 19:57     ` Maciej W. Rozycki
2025-02-20 17:54 ` Richard Henderson
2025-02-20 17:59   ` Linus Torvalds
2025-02-20 18:12     ` Richard Henderson
2025-02-20 19:07   ` Matt Turner
2025-02-20 20:09     ` Maciej W. Rozycki
2025-02-20 21:05   ` Maciej W. Rozycki
2025-02-25 20:44 ` Maciej W. Rozycki

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