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From: Vladimir Murzin <vladimir.murzin@arm.com>
To: Marc Zyngier <maz@kernel.org>, Neeraj Upadhyay <neeraju@codeaurora.org>
Cc: mark.rutland@arm.com, suzuki.poulose@arm.com,
	ionela.voinescu@arm.com, MSM <linux-arm-msm@vger.kernel.org>,
	lkml <linux-kernel@vger.kernel.org>,
	catalin.marinas@arm.com, Will Deacon <will@kernel.org>,
	valentin.schneider@arm.com, linux-arm-kernel@lists.infradead.org
Subject: Re: AMU extension v1 support for cortex A76, A77, A78 CPUs
Date: Fri, 20 Nov 2020 09:09:00 +0000	[thread overview]
Message-ID: <e15de351-63c1-2599-82bf-22c95e8a6a62@arm.com> (raw)
In-Reply-To: <1712842eb0767e51155a5396d282102c@kernel.org>

On 11/20/20 8:56 AM, Marc Zyngier wrote:
> On 2020-11-20 04:30, Neeraj Upadhyay wrote:
>> Hi,
>>
>> For ARM cortex A76, A77, A78 cores (which as per TRM, support AMU)
>> AA64PFR0[47:44] field is not set, and AMU does not get enabled for
>> them.
>> Can you please provide support for these CPUs in cpufeature.c?
> 
> If that was the case, that'd be an erratum, and it would need to be
> documented as such. It could also be that this is an optional feature
> for these cores (though the TRM doesn't suggest that).
> 
> Can someone at ARM confirm what is the expected behaviour of these CPUs?

Not a confirmation, but IIRC, these are imp def features, while our cpufeatures
catches architected one.

Cheers
Vladimir

> 
>         M.


  reply	other threads:[~2020-11-20  9:09 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-20  4:30 Neeraj Upadhyay
2020-11-20  8:56 ` Marc Zyngier
2020-11-20  9:09   ` Vladimir Murzin [this message]
2020-11-20  9:54     ` Marc Zyngier
2020-11-20 10:14       ` Vladimir Murzin
2020-11-20 10:13     ` Mark Rutland
2020-11-24  5:22       ` Neeraj Upadhyay
2020-11-20 10:20   ` Sudeep Holla

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